參數(shù)資料
型號: STi4600
廠商: 意法半導(dǎo)體
英文描述: 6 Channel Dolby AC-3 MPEG1/2 Audio Decoder(六通道音頻解碼器)
中文描述: 6聲道杜比AC - 3 MPEG1 / 2音頻解碼器(六通道音頻解碼器)
文件頁數(shù): 8/52頁
文件大小: 321K
代理商: STI4600
8/52
STi4600
3 INTERNAL CIRCUIT DESCRIPTION
3.1 ARCHITECTURE
The STi4600 is based on a programmable core
optimized for audio decoding algorithms. Dedicat-
ed hardware has been added to perform specific
operations such as bitstream depacking or IEC
data formatting.
The arrows in Figure 3 indicate the data flow within
the chip. The compressed bitstream is input via
the input interface. Data is transferred on a byte
basis to the FIFO. This FIFO allows burst input
data up to 33Mbit/s. The input processor depacks
the bitstream (Packet level).The compressed au-
dio frames with their associated information (PTS)
are stored into the circular frame buffer before the
audio core decoder extracts and decodes them.
The samples are the output of the core audio de-
coder.
The PCM unit converts the samples to the PCM
format.The PCM unit controls the channel delay
buffer in order to delay each channel independent-
ly.
The IEC unit transmits non compressed data or
compressed data. In the compressed mode the
data is extracted from the circular buffer and for-
matted according to the IEC1937 standard. In non
compressed modes the left and right PCM chan-
nels are output by the IEC unit.
Figure 3. STi4600 Architecture and Dataflow
Input Data
Interface
Input Processor
FIFO
256x8
Circular Frame Buffer
Core Audio Decoder
PCM
Unit
Control,
Host Interface
Status
PCMOUT
DataIn
Channel Delay
Buffer (35 ms)
IEC958
Formater
I958OUT
Clocks
1
2
3
4
5
6
7
8
相關(guān)PDF資料
PDF描述
STI4600 6 CHANNEL DOLBY AC-3 MPEG1/2 AUDIO DECODER
STK12N06L N - Channel Enhancement Mode Low Threshold Power MOS Transistor(N溝道增強模式低閾值功率MOS晶體管)
STK12N05L N - Channel Enhancement Mode Low Threshold Power MOS Transistor(N溝道增強模式低閾值功率MOS晶體管)
STK22N05 N-Channel Enhancement Mode Power MOS Transistor(N溝道增強模式功率MOSFET)
STK22N06 N-Channel Enhancement Mode Power MOS Transistor(N溝道增強模式功率MOSFET)
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