參數(shù)資料
型號: STi4600
廠商: 意法半導(dǎo)體
英文描述: 6 Channel Dolby AC-3 MPEG1/2 Audio Decoder(六通道音頻解碼器)
中文描述: 6聲道杜比AC - 3 MPEG1 / 2音頻解碼器(六通道音頻解碼器)
文件頁數(shù): 34/52頁
文件大?。?/td> 321K
代理商: STI4600
34/52
STi4600
REGISTER DESCRIPTION
(Cont’d)
PLLPCM -
PCM PLL Disable
Address
Type
Software Reset:
Hardware Reset:
:
:
0x12
R/W
NC
1
Description
When a Hard reset occurs the PLL is disabled.
The host must write 0xD2 in this register to enable
it.
When a Soft reset occurs the register remains un-
changed.
RP
: Run PLL. When high the DAC PLL is
running.
DP
: Disable pad. When low the PCM clock
divider is enabled.
5.4.5 Channel Delay Setup
The unit for the delay is a group of 16 samples.The
maximum delay is 35 ms. The sum of all the de-
lays must be under 1680/16=35 ms * 48 KHz.
When only one surround channel is present (Pro-
logic or other mode), the right surround delay must
be clear, the left delay channel is used for both
surround channels.
LDLY -
Left Channel
Address
Type
Software Reset:
Hardware Reset:
:
:
0x57
R/W
NC
UND
RDLY -
Right Channel
Address
Type
Software Reset:
Hardware Reset:
:
:
0x58
R/W
NC
UND
CDLY -
Centre Channel
Address
Type
Software Reset:
Hardware Reset:
:
:
0x59
R/W
NC
UND
SUBDLY -
Subwoofer Channel
Address
Type
Software Reset:
Hardware Reset:
:
:
0x5A
R/W
NC
UND
LSDLY -
Left Surround Channel
Address
Type
Software Reset:
Hardware Reset:
:
:
0x5B
R/W
NC
UND
RSDLY -
Right Surround Channel
Address
Type
Software Reset:
Hardware Reset:
:
:
0x5C
R/W
NC
UND
1
0
12
RP
DP
7
6
5
4
3
2
1
0
57
7
6
5
4
3
2
1
0
58
7
6
5
4
3
2
1
0
59
7
6
5
4
3
2
1
0
5A
7
6
5
4
3
2
1
0
5B
7
6
5
4
3
2
1
0
5C
相關(guān)PDF資料
PDF描述
STI4600 6 CHANNEL DOLBY AC-3 MPEG1/2 AUDIO DECODER
STK12N06L N - Channel Enhancement Mode Low Threshold Power MOS Transistor(N溝道增強(qiáng)模式低閾值功率MOS晶體管)
STK12N05L N - Channel Enhancement Mode Low Threshold Power MOS Transistor(N溝道增強(qiáng)模式低閾值功率MOS晶體管)
STK22N05 N-Channel Enhancement Mode Power MOS Transistor(N溝道增強(qiáng)模式功率MOSFET)
STK22N06 N-Channel Enhancement Mode Power MOS Transistor(N溝道增強(qiáng)模式功率MOSFET)
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