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參數(shù)資料
| 型號： | ST16C554CQ64-F |
| 廠商： | Exar Corporation |
| 文件頁數(shù)： | 5/39頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC UART FIFO 16B QUAD 64LQFP |
| 標(biāo)準(zhǔn)包裝： | 160 |
| 特點(diǎn)： | * |
| 通道數(shù)： | 4，QUART |
| FIFO's： | 16 字節(jié) |
| 規(guī)程： | RS232 |
| 電源電壓： | 2.97 V ~ 5.5 V |
| 帶自動流量控制功能： | 是 |
| 帶故障啟動位檢測功能： | 是 |
| 帶調(diào)制解調(diào)器控制功能： | 是 |
| 帶CMOS： | 是 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-LQFP |
| 供應(yīng)商設(shè)備封裝： | 64-LQFP（10x10） |
| 包裝： | 托盤 |
| 其它名稱： | 1016-1264 |
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ST16C554/554D
13
REV. 4.0.1
2.97V TO 5.5V QUAD UART WITH 16-BYTE FIFO
2.10.1
Receive Holding Register (RHR) - Read-Only
The Receive Holding Register is an 8-bit register that holds a receive data byte from the Receive Shift
Register. It provides the receive data interface to the host processor. The RHR register is part of the receive
FIFO of 16 bytes by 11-bit wide, the 3 extra bits are for the 3 error tags to be reported in LSR register. When
the FIFO is enabled by FCR bit-0, the RHR contains the first data character received by the FIFO. After the
RHR is read, the next character byte is loaded into the RHR and the errors associated with the current data
byte are immediately updated in the LSR bits 2-4.
FIGURE 8. RECEIVER OPERATION IN NON-FIFO MODE
FIGURE 9. RECEIVER OPERATION IN FIFO
Receive Data Shift
Register (RSR)
Receive
Data Byte
and Errors
RHR Interrupt (ISR bit-2)
Receive Data
Holding Register
(RHR)
RXFIFO1
16X Clock
Receive Data Characters
Data Bit
Validation
Error
Tags in
LSR bits
4:2
Receive Data S hift
R egister (R S R )
RX FIFO 1
16X C lock
Err
o
rT
a
g
s
(16
-se
ts
)
Er
ro
rT
a
g
s
i
n
LS
R
b
it
s
4:
2
R eceive D ata C haracters
D ata B it
V alidation
Receive
D ata FIF O
Receive
Data
Receive Data
B yte and E rrors
R H R Interrupt (IS R bit-2) program m ed for
desired FIFO trigger level.
FIFO is E nabled by F C R bit-0=1
A sking for stopping data w hen data fills above the flow
control trigger level to suspend rem ote transm itter.
A sking for sending data w hen data falls below the flow
control trigger level to restart rem ote transm itter.
16 bytes by 11-bit w ide
FIFO
T rigger=8
D ata falls to
4
D ata fills to
14
E xam ple
: - R X F IF O trigger level selected at 8 bytes
(See N ote Below )
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ST16C554D | 制造商:EXAR 制造商全稱:EXAR 功能描述:QUAD UART WITH 16-BYTE FIFOS |
| ST16C554DCJ | 制造商:Exar Corporation 功能描述: |
| ST16C554DCJ68 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Exar Corporation 功能描述: 制造商:Exar Corporation 功能描述:IC,UART,LDCC,68PIN,PLASTIC |
| ST16C554DCJ-68 | 制造商:Exar Corporation 功能描述:IC,UART,LDCC,68PIN,PLASTIC |
| ST16C554DCJ68-F | 功能描述:UART 接口集成電路 2.97V-5.5V 16B FIFO temp -45 to 85C;UART RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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