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參數(shù)資料
| 型號(hào)： | ST1300AAA-FREQ(T) |
| 廠商： | PERICOM SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | VCXO, CLOCK, 1.5 MHz - 28.6363 MHz, LVCMOS OUTPUT |
| 文件頁(yè)數(shù)： | 2/3頁(yè) |
| 文件大?。?/td> | 2985K |
| 代理商： | ST1300AAA-FREQ(T) |
S1300 / S1309 / ST1300 / ST1309 Series
SaRonix
Voltage Controlled Crystal Oscillator
Technical Data
3.3V, LVCMOS
DS-126
REV E
All specifications are subject to change without notice.
Stability Tolerance
AA = ±20ppm, 0 to +70°C
A = ±25ppm, 0 to +70°C
B = ±50ppm, 0 to +70°C
E = ±50ppm, -40 to +85°C
Package Details
Part Numbering Guide
5.08
.200
max
.46±.08
.018±.003
0.91
.036
max
7.62±.20
.300±.008
7.62±.20
.300±.008
Pin 5
Output
Pin 8
VDD
Pin 1
Control
Voltage
Pin 4
GND Case (VSS)
Scale: None (Dimensions in
)
mm
inches
SARONIX
Denotes Pin 1
HALF SIZE PACKAGE
SARONIX
VCXO
Denotes Pin 1
Pin 3
Pin 1
Pin 7
7.75
.305
Pin 12
Pin 14
15.24±.13
.600±.005
5.08
.200
max
6.35±0.51
0.25±0.02
3.94±.25
.155±.010
.46±.08
.018±.003
21.0
.825
max
0.91
.036
13.0
.510
max
Tri-State Logic Table
(4) Glass Insulators
Pin 8
Pin Function:
Pin 8: OUTPUT
Pin 12: N/C (optional)
Pin 14: +3.3VDC (VDD)
Pin 1: Control Voltage
Pin 3: Tri-State control (optional)
Pin 7: GND/Case (VSS)
Marking Format
**
Includes Date Code, Frequency & Part Number
13.0
.510
max
6.35±0.51
0.25±0.02
13.0
.510
max
Frequency (MHz)
SaRonix
Blank = Non Tri-State
T = Tri-State (6 pins)
Supply Voltage
S T 130 9 A A A J - 19.4400 (T)
Lead/Package Types
Blank = Thru-Hole
S = True SMD Adaptor for DIL14
J = Gull Wing
Linearity
A = 5%
B = 10%
Pullability (Minimum APR)**
A = ±50 ppm
M = ±70 ppm
B = ±100 ppm, not available at all frequencies
130 = 3.3V
Pin 3(2) Input
Logic 1 or NC
Logic 0 or GND
Pin 8(5) Output
Oscillation
High Impedance
Required Input Levels on Pin 3(2):
Logic 1 = 0.7 VDD min
Logic 0 = 0.3 VDD max
mA
M
POWER
SUPPLY
V M
OSCILLATOR
VDD
OUT
GND
Pin 14(8)
Pin 8(5)
Pin 1(1)
*
Pin 7(4)
Pin 3(2)
TEST
POINT
OPTIONAL
TRI-STATE
CONTROL
VOLTAGE
NOTE A: CL includes probe and fixture capacitance
* Items in brackets( ) represent Half Size model
CL (Note A) = 30pF
Test Circuit
max
Marking Format
**
Includes Date Code, Frequency & Part Number
**Exact location of items may vary
max
2.54
.100
Pin 2
Optional
Tri-State Control
SaRonix
www.pericom.com/saronix
Package Size
0 = Full Size
9 = 1/2 Size
** APR = (VCXO Pull relative to specified Output Frequency) – (VCXO Frequency Stability)
NOTE: APR is inclusive of 10 Years Aging
Packing Method
(T) = Tape & Reel for SMD versions,
full reel increments only (200pcs)
Blank = Bulk
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