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參數(shù)資料
| 型號(hào)： | SST26WF032-80-4I-QAE |
| 廠商： | SILICON STORAGE TECHNOLOGY INC |
| 元件分類： | PROM |
| 英文描述： | 32M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| 封裝： | 6 X 5 MM, ROHS COMPLIANT, WSON-8 |
| 文件頁數(shù)： | 11/36頁 |
| 文件大小： | 1339K |
| 代理商： | SST26WF032-80-4I-QAE |
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2010 Silicon Storage Technology, Inc.
S71409-01-000
01/10
19
1.8V Serial Quad I/O (SQI) Flash Memory
SST26WF032
Advance Information
Block-Erase
The Block-Erase instruction clears all bits in the selected block to ‘1’. Block sizes can be 8 KByte, 32
KByte or 64 KByte depending on address, see Figure 3, Memory Map, for details. A Block-Erase
instruction applied to a protected memory area will be ignored. Prior to any write operation, execute
the WREN instruction. Keep CE# active low for the duration of any command sequence.
To execute a Block-Erase operation, the host drives CE# low then sends the Block-Erase command
cycle (D8H), three address cycles, then drives CE# high. Each cycle is two nibbles, or clocks, long,
most significant nibble first. Address bits AMS-A13 determine the block address; the remaining address
bits can be VIL or VIH. For 32 KByte blocks, A14:A13 can be VIL or VIH; for 64 KByte blocks, A15:A13 can
be VIL or VIH. Poll the BUSY bit in the Status register or wait TBE for the completion of the internal, self-
timed, Block-Erase operation See Figure 16 for the Block-Erase sequence.
Figure 16:Block-Erase Sequence
Chip-Erase
The Chip-Erase instruction clears all bits in the device to ‘1.’ The Chip-Erase instruction is ignored if
any of the memory area is protected. Prior to any write operation, execute the the WREN instruction.
To execute a Chip-Erase operation, the host drives CE# low, sends the Chip-Erase command cycle
(C7H), then drives CE# high. A cycle is two nibbles, or clocks, long, most significant nibble first. Poll the
BUSY bit in the Status register or wait TCE for the completion of the internal, self-timed, Chip-Erase
operation. See Figure 17 for the Chip Erase sequence.
Figure 17:Chip-Erase Sequence
1409 F08.0
MODE 3
0
1
SCK
SIO(3:0)
CE#
C1 C0
MODE 0
2
A5 A4
MSN LSN
4
A3 A2
6
A1 A0
Note: MSN = Most Significant Nibble,
LSN = Least Significant Nibble
C[1:0] = D8H
1409 F09.0
MODE 3
0
1
SCK
SIO(3:0)
CE#
C1 C0
MODE 0
Note: C[1:0] = C7H
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SST26WF032-80-4I-QAE-T | 制造商:Microchip Technology Inc 功能描述:1.65 TO 1.95V 32MBIT SERIAL QUAD I/O FLASH - Tape and Reel |
| SST26WF032-80-4I-S2AE | 功能描述:閃存 1.65 to 1.95V 32Mbit Serial Quad I/O Flsh RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| SST26WF032-80-4I-S2AE-T | 制造商:Microchip Technology Inc 功能描述:1.65 TO 1.95V 32MBIT SERIAL QUAD I/O FLASH - Tape and Reel |
| SST270 | 功能描述:JFET 45V 2mA RoHS:否 制造商:ON Semiconductor 晶體管極性:N-Channel 漏極電流（Vgs=0 時(shí)的 Idss）:50 mA 漏源電壓 VDS:15 V 閘/源擊穿電壓: 漏極連續(xù)電流:50 mA 配置: 安裝風(fēng)格: 封裝 / 箱體:SC-59 封裝:Reel |
| SST270-E3 | 功能描述:JFET 45V 2mA RoHS:否 制造商:ON Semiconductor 晶體管極性:N-Channel 漏極電流（Vgs=0 時(shí)的 Idss）:50 mA 漏源電壓 VDS:15 V 閘/源擊穿電壓: 漏極連續(xù)電流:50 mA 配置: 安裝風(fēng)格: 封裝 / 箱體:SC-59 封裝:Reel |
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