參數(shù)資料
型號(hào): SP505AN
英文描述: Multi-Protocol Serial Transceivers
中文描述: 多協(xié)議串行收發(fā)器
文件頁(yè)數(shù): 19/35頁(yè)
文件大?。?/td> 495K
代理商: SP505AN
19
Rev: A Date: 1/27/04
SP505 Multi–Mode Serial Transceiver
Copyright 2004 Sipex Corporation
Phase 2 (±10V)
— V
transfer — Phase two of the clock con-
nects the negative terminal of C
to the V
SS
storage capacitor and the positive terminal of C
2
to ground, and transfers the generated –l0V or
the generated –5V to C
. Simultaneously, the
positive side of capacitor C
is switched to +5V
and the negative side is connected to ground.
Phase 2 (±5V)
— V
& V
DD
charge storage — C
nected to V
to recharge the C
capacitor. C
2
is switched to ground and C
The 5V charge from Phase 1 is now transferred
to the V
storage capacitor. V
SS
receives a
continuous charge from either C
. With
the C1 capacitor charged to 5V, the cycle begins
again.
+
is recon-
+
is connected to C
3
.
Phase 3
— V
charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C
produces –5V in the negative
terminal of C
, which is applied to the negative
side of capacitor C
. Since C
voltage potential across C
is l0V. For the 5V
output, C
potential on C
2
is only +5V.
+
is at +5V, the
+
is connected to ground so that the
Phase 4
— V
transfer — The fourth phase of the
clock connects the negative terminal of C
to
ground and transfers the generated l0V or the
generated 5V across C
to C
, the V
storage
capacitor. Again, simultaneously with this, the
positive side of capacitor C
is switched to +5V
and the negative side is connected to ground,
and the cycle begins again.
Since both V
DD
and V
are separately gener-
ated from V
in a no–load condition, V
and
V
will be symmetrical. Older charge pump
approaches that generate V
from V
+
will show
a decrease in the magnitude of V
compared to
V
+
due to the inherent inefficiencies in the
design.
The clock rate for the charge pump typically
operates at 15kHz. The external capacitors must
be a minimum of 22
μ
F with a 16V breakdown
rating.
External Power Supplies
For applications that do not require +5V only,
external supplies can be applied at the V+ and
V
pins. The value of the external supply volt-
ages must be no greater than +l0.5V. The toler-
ance should be +5% from +10V. The current
drain for the supplies is used for RS-232 and RS-
423 drivers. For the RS-232 driver, the current
requirement will be 3.5mA per driver. The RS-
423 driver worst case current drain will be
11mA per driver. Power sequencing is required
for the SP505. The supplies must be sequenced
accordingly: +10V, +5V and –10V. It is impor-
tant to prevent V
SS
from starting up before V
CC
or V
DD
.
Figure 47. Charge Pump Phase 2 for +10V.
Figure 49. Charge Pump Phase 3.
V
CC
= +5V
–10V
V
DD
Storage Capacitor
C
1
C
2
C
4
+
+
+
V
SS
Storage Capacitor
C
3
+
V
CC
= +5V
–5V
–5V
+5V
V
DD
Storage Capacitor
C
1
C
2
C
4
+
+
+
V
SS
Storage Capacitor
C
3
+
Figure 50. Charge Pump Phase 4.
Figure 48. Charge Pump Phase 2 for +5V.
V
CC
= +5V
V
DD
Storage Capacitor
C
1
C
2
C
4
+
+
+
V
SS
Storage Capacitor
C
3
+
–5V
V
CC
= +5V
+10V
V
DD
Storage Capacitor
C
1
C
2
C
4
+
+
+
V
SS
Storage Capacitor
C
3
+
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