參數(shù)資料
型號: LTC2630HSC6-LM12#TRMPBF
廠商: Linear Technology
文件頁數(shù): 5/22頁
文件大?。?/td> 0K
描述: IC DAC 12BIT R-R SC70-6
產(chǎn)品培訓模塊: LTC263x 12-, 10-, and 8-Bit VOUT DAC Family
標準包裝: 1
設置時間: 4.4µs
位數(shù): 12
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 單電源
功率耗散(最大): 480µW
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 6-TSSOP,SC-88,SOT-363
供應商設備封裝: SC-70-6
包裝: 標準包裝
輸出數(shù)目和類型: 1 電壓,單極
采樣率(每秒): *
其它名稱: LTC2630HSC6-LM12#TRMPBFDKR
LTC2630
13
2630ff
timing Diagram
The LTC2630 is a family of single voltage output DACs in
6-lead SC70 packages. Each DAC can operate rail-to-rail
referenced to the input supply, or with its full-scale voltage
set by an integrated reference. Twelve combinations of
accuracy (12-, 10-, and 8-bit), power-on reset value (zero
or mid-scale), and full-scale voltage (2.5V or 4.096V) are
available. The LTC2630 is controlled using a 3-wire SPI/
MICROWIRE compatible interface.
Power-On Reset
The LTC2630-HZ/-LZ clear the output to zero scale when
power is first applied, making system initialization con-
sistent and repeatable.
For some applications, downstream circuits are active
during DAC power-up, and may be sensitive to nonzero
outputs from the DAC during this time. The LTC2630
contains circuitry to reduce the power-on glitch: the
analog output typically rises less than 5mV above zero
scale during power on if the power supply is ramped
to 5V in 1ms or more. In general, the glitch amplitude
decreases as the power supply ramp time is increased.
See “Power-On Reset Glitch” in the Typical Performance
Characteristics section.
The LTC2630-HM/-LM provide an alternative reset, set-
ting the output to mid-scale when power is first applied.
SDI
CS/LD
SCK
t2
t10
t5
t7
t6
t1
t3
t4
1
2
3
23
24
2630 F01
operation
Transfer Function
The digital-to-analog transfer function is
VOUT(IDEAL) =
k
2N
VREF
where k is the decimal equivalent of the binary DAC
input code, N is the resolution, and VREF is either 2.5V
(LTC2630-L) or 4.096V (LTC2630-H) in internal refer-
ence mode, and VCC in Supply as reference mode.
Table 1. Command Codes
Command*
C3 C2 C1 C0
0
Write to Input Register
0
1
Update (Power up) DAC Register
0
1
Write to and Update (Power up) DAC Register
0
1
0
Power down
0
1
0
Select Internal Reference (Power-on Reset Default)
0
1
Select Supply as Reference (VREF = VCC)
*Command codes not shown are reserved and should not be used.
Figure 1. Serial Interface Timing
相關PDF資料
PDF描述
LTC2630HSC6-HZ12#TRMPBF IC DAC 12BIT R-R SC70-6
P51-750-A-P-I12-20MA-000-000 SENSOR 750PSI M20-1.5 6G 4-20MA
P51-500-A-Z-P-4.5OVP-000-000 SENSOR 500PSI 1/4-18NPT .5-4.5V
P51-2000-A-M-I12-20MA-000-000 SENSOR 2000PSI M10-1.0 6G 4-20MA
P51-500-A-A-D-4.5V-000-000 SENSOR 500PSI 1/4-18NPT .5-4.5V
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