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參數(shù)資料
| 型號(hào)： | SN54LV132AFK |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | QUADRUPLE POSITIVE-NAND GATES WITH SCHMITT-TRIGGER INPUTS |
| 中文描述： | 翻兩番陽性的NAND與施密特蓋茨觸發(fā)輸入 |
| 文件頁數(shù)： | 3/13頁 |
| 文件大小： | 333K |
| 代理商： | SN54LV132AFK |
SCLS394H APRIL 1998 REVISED APRIL 2005
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
recommended operating conditions (see Note 4)
SN54LV132A
MIN
SN74LV132A
MIN
UNIT
MAX
MAX
VCC
VI
VO
Supply voltage
2
5.5
2
5.5
V
Input voltage
0
5.5
0
5.5
V
Output voltage
0
VCC
50
0
VCC
50
V
μ
A
VCC = 2 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
VCC = 2 V
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 4.5 V to 5.5 V
IOH
High-level output current
2
2
6
6
mA
12
12
50
50
μ
A
IOL
Low-level output current
2
2
6
6
mA
12
12
TA
Operating free-air temperature
55
125
40
85
°
C
NOTE 4: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs
, literature number SCBA004.
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
TEST CONDITIONS
VCC
SN54LV132A
MIN
SN74LV132A
MIN
UNIT
TYP
MAX
1.75
TYP
MAX
1.75
VT+
2.5 V
input threshold voltage
3.3 V
2.31
2.31
V
Positive-going
5 V
3.5
3.5
VT
2.5 V
0.75
0.75
input threshold voltage
3.3 V
0.99
0.99
V
Negative-going
5 V
1.5
1.5
VT
2.5 V
0.25
1
0.25
1
Hysteresis (VT+ VT)
3.3 V
0.33
1.32
0.33
1.32
V
5 V
0.5
2
0.5
2
IOH = 50
μ
A
IOH = 2 mA
IOH = 6 mA
IOH = 12 mA
IOL = 50
μ
A
IOL = 2 mA
IOL = 6 mA
IOL = 12 mA
VI = 5.5 V or GND
VI = VCC or GND,
VI or VO = 0 to 5.5 V
VI = VCC or GND
2 V to 5.5 V
VCC 0.1
VCC 0.1
VOH
2.3 V
2
2
V
3 V
2.48
2.48
4.5 V
3.8
3.8
2 V to 5.5 V
0.1
0.1
VOL
2.3 V
0.4
0.4
V
3 V
0.44
0.44
4.5 V
0.55
±
1
20
0.55
±
1
20
II
ICC
Ioff
Ci
0 to 5.5 V
μ
A
μ
A
μ
A
pF
IO = 0
5.5 V
0
5
5
3.3 V
1.9
1.9
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