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SM5320130UUXUUU
November 19, 1996
C
orporate Headquarters: 4305 Cushing Pkwy., Fremont, CA 94538, USA Tel:(510) 623-1231 Fax:(510) 623-1434 E-mail: info@smartm.com
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10
SMART
Modular Technologies
Notes:
1.
An initial pause of atleast 200
s is required after power-up followed by any eight RAS# cycles before device operation is
achieved.
2.
VIH(min) and VIL(max) are reference levels for measuring timing of input signals. Transition times are measured between
VIH(min) and VIL(max) and are assumed to be 5ns for all inputs.
3.
Measure with a load equivalent to 2 TTL(5V device)/1 TTL(3.3V device) loads and 100pF.
4.
Operation within the tRCD(max) limit ensures that tRAC(max) limit can be met; tRCD(max) is specied as a reference point
only. If tRCD is greater than the specied tRCD(max) limit, then access time is controlled exclusively by tCAC.
5.
Assumes that tRCD ≥ tRCD(max).
6.
This parameter denes the time at which the output achieves open circuit condition and is not referenced to VOH or VOL.
7.
tWCS is non restrictive operating parameter. It is included in the data sheet as electrical characteristic only. If tWCS ≥
tWCS(min) the cycle is an early write cycle and the data out pin will remain at high impedance for the duration of the cycle.
8.
Either tRCH or tRRH must be satised for a read cycle.
9.
These parameters are referenced to the CAS# leading edge in early write cycles.
10. Operation within the tRAD(max) limit ensures that tRAC(max) can be met. tRAD(max) is specied as a reference point only.
If tRAD is greater than the specied tRAD(max) limit, then access time is controlled by tAA.
11. Access time is determined by the longer of tAA , tCAC or tACP.
12. tRASP denes RAS# pulse width in fast page mode cycles.
13. tAR, tWC, tDHR are referenced to tRAD(max).