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參數(shù)資料
| 型號(hào)： | SAB-XC167CI-16F20F |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | 0.50 MM PITCH, PLASTIC, TQFP-144 |
| 文件頁(yè)數(shù)： | 14/80頁(yè) |
| 文件大?。?/td> | 2477K |
| 代理商： | SAB-XC167CI-16F20F |
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XC167
Derivatives
Functional Description
Data Sheet
17
V1.1, 2003-06
Preliminary
3
Functional Description
The architecture of the XC167 combines advantages of RISC, CISC, and DSP
processors with an advanced peripheral subsystem in a very well-balanced way. In
addition, the on-chip memory blocks allow the design of compact systems-on-silicon with
maximum performance (computing, control, communication).
The on-chip memory blocks (program code-memory and SRAM, dual-port RAM, data
SRAM) and the set of generic peripherals are connected to the CPU via separate buses.
Another bus, the LXBus, connects additional on-chip resoures as well as external
resources (see Figure 3).
This bus structure enhances the overall system performance by enabling the concurrent
operation of several subsystems of the XC167.
The following block diagram gives an overview of the different on-chip components and
of the advanced, high bandwidth internal bus structure of the XC167.
Figure 3
Block Diagram
In terrup t B u s
XTAL
M C B 0 4323_x7.vs d
Osc / PLL
C lock G enera tion
RTC
WD T
GPT
T2
T3
T4
T5
T6
SSC0
BR G e n
(S P I)
AS C1
BR G en
(U SAR T )
ADC
8/10-B it
16
C hannels
CC2
T7
T8
EBC
XBU S C o n tro l
Ex tern al Bu s
Con trol
ProgM em
Flas h
128 K B ytes
P 2 0
4
16
Po rt 5
16
PSRAM
DPRAM
DS RA M
C 166SV2-C ore
PMU
DM
U
CP U
AS C 0
BR G e n
(U SAR T )
IIC
BR G e n
SS C1
BR G e n
(SPI)
CC 1
T0
T1
Tw in
CAN
A
B
PO R T 1
PO R T 0
Po rt 2
Po rt 3
Po rt 4
Port 6
P 7
Po rt 9
16
8
15
8
6
Interrupt & PE C
P e ripheral D a ta Bus
OCDS
D ebug Support
CC 6
T1 2
T1 3
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