
PCI-X to Serial ATA Controller
Data Sheet
Silicon Image, Inc.
2006 Silicon Image, Inc.
SiI-DS-0160-C
48
6 Auto-Initialization
The SiI3124 supports an external Flash and/or EEPROM device for BIOS extensions and user-defined PCI configuration
header data.
6.1 Auto-Initialization from Flash
The SiI3124 initiates the Flash detection and configuration space loading sequence upon the release of PCI_RST_N.
It
begins by reading the highest two addresses (7FFFFH and 7FFFEH), checking for the correct data signature pattern – AAH and
55H, respectively. If the data signature pattern is correct, the SiI3124 continues to sequence the address downward, reading a
total of twelve bytes.
If the Data Signature is correct (55H at 7FFFCH), the last eight bytes are loaded into the PCI
Configuration Space registers.
If both Flash and EEPROM are installed, the PCI Configuration Space registers will be loaded with the EEPROM’s data.
While the sequence is active, the SiI3124 responds to all PCI bus accesses with a Target Retry.
D11
D10
D05
D04
D03
D02
D01
D00
FL_ADDR
MEM_ADDR
FL_DATA
FL_RD_N
FL_WR_N
FL_CS_N
PCI_RST_N
t1
t2
7FFFF
7FFFE
7FFFD
7FFFC
7FFFB
7FFFA
7FFF5
7FFF4
Figure 6-1 Auto-Initialization from Flash Timing
Parameter
Value
Description
t1
660 ns
PCI reset to Flash Auto-Initialization cycle begin
t2
4700 ns
Flash Auto-Initialization cycle time
Table 6-1 Auto-Initialization from Flash Timing
Address
Data Byte
Description
7FFFFH
D00
Data Signature = AAH
7FFFEH
D01
Data Signature = 55H
7FFFDH
D02
AA = 120 ns Flash device / Else, 240 ns Flash device
7FFFCH
D03
Data Signature = 55H
7FFFBH
D04
PCI Device ID [23:16]
7FFFAH
D05
PCI Device ID [31:24]
7FFF9H
D06
PCI Class Code [23:16]
7FFF8H
D07
PCI Class Code [15:08]
7FFF7H
D08
PCI Sub-System Vendor ID [07:00]
7FFF6H
D09
PCI Sub-System Vendor ID [15:08]
7FFF5H
D10
PCI Sub-System ID [23:16]
7FFF4H
D11
PCI Sub-System ID [31:24]
Table 6-2 Flash Data Description