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參數(shù)資料
| 型號： | SC16IS752IBS |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 連接器件 |
| 英文描述： | Dual UART with I2C-bus-SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support |
| 封裝： | SC16IS752IBS<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;SC16IS752IBS<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html& |
| 文件頁數(shù)： | 14/60頁 |
| 文件大?。?/td> | 356K |
| 代理商： | SC16IS752IBS |
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SC16IS752_SC16IS762
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 8 — 1 September 2011
14 of 60
NXP Semiconductors
SC16IS752; SC16IS762
Dual UART with I
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
7.5 Interrupts
The SC16IS752/SC16IS762 has interrupt generation and prioritization (seven prioritized
levels of interrupts) capability. The interrupt enable registers (IER and IOIntEna) enable
each of the seven types of interrupts and the IRQ signal in response to an interrupt
generation. When an interrupt is generated, the IIR indicates that an interrupt is pending
and provides the type of interrupt through IIR[5:0].
Table 6
summarizes the interrupt
control functions.
Table 6.
IIR[5:0]
It is important to note that for the framing error, parity error, and break conditions, Line
Status Register bit 7 (LSR[7]) generates the interrupt. LSR[7] is set when there is an error
anywhere in the RX FIFO, and is cleared only when there are no more errors remaining in
the FIFO. LSR[4:2] always represent the error status for the received character at the top
of the RX FIFO. Reading the RX FIFO updates LSR[4:2] to the appropriate status for the
new character at the top of the FIFO. If the RX FIFO is empty, then LSR[4:2] are all zeros.
For the Xoff interrupt, if an Xoff flow character detection caused the interrupt, the interrupt
is cleared by an Xon flow character detection. If a special character detection caused the
interrupt, the interrupt is cleared by a read of the IIR.
Summary of interrupt control functions
Priority
level
none
none
1
receiver line status
Interrupt type
Interrupt source
00 0001
00 0110
none
Overrun Error (OE), Framing Error (FE), Parity Error
(PE), or Break Interrupt (BI) errors occur in
characters in the RX FIFO
stale data in RX FIFO
receive data ready (FIFO disable) or
RX FIFO above trigger level (FIFO enable)
transmit FIFO empty (FIFO disable) or
TX FIFO passes above trigger level (FIFO enable)
change of state of modem input pins
input pins change of state
receive Xoff character(s)/special character
RTS pin or CTS pin change state from active (LOW)
to inactive (HIGH)
00 1100
00 0100
2
2
RX time-out
RHR interrupt
00 0010
3
THR interrupt
00 0000
00 1110
01 0000
10 0000
4
5
6
7
modem status
I/O pins
Xoff interrupt
CTS, RTS
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| SC16IS752IBS,128 | 功能描述:UART 接口集成電路 I2C/SPI-UARTBRIDGE RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16IS752IBS,151 | 功能描述:UART 接口集成電路 UART DUAL I2C/SPI RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16IS752IBS,157 | 功能描述:UART 接口集成電路 I2C/SPI-UARTBRIDGE RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16IS752IBS-F | 功能描述:UART 接口集成電路 I2C/SPI-UARTBRIDGE W/IRDA AND GPIO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16IS752IPW | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Dual UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support |
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