參數(shù)資料
型號(hào): SC16IS740IPW
廠商: NXP Semiconductors N.V.
元件分類: 連接器件
英文描述: Single UART with I2C-bus-SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support
封裝: SC16IS740IPW/Q900<SOT403-1 (TSSOP16)|<<http://www.nxp.com/packages/SOT403-1.html<1<Always Pb-free,;SC16IS740IPW<SOT403-1 (TSSOP16)|<<http://www.nxp.com/packages/SOT403-1.
文件頁(yè)數(shù): 7/62頁(yè)
文件大?。?/td> 308K
代理商: SC16IS740IPW
SC16IS740_750_760_6
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 06 — 13 May 2008
7 of 62
NXP Semiconductors
SC16IS740/750/760
Single UART with I
2
C-bus/SPI interface, 64-byte FIFOs, IrDA SIR
6.2 Pin description
a. I
2
C-bus interface
b. SPI interface
Fig 7.
Pin configuration for HVQFN24
R
G
G
R
T
C
A0
I2C
V
DD
XTAL1
RESET
XTAL2
n
A
I
S
S
G
002aab015
GPIO5/DTR
GPIO4/DSR
GPIO3
GPIO2
GPIO1
V
SS
SC16IS750IBS
SC16IS760IBS
Transparent top view
terminal 1
index area
6
13
5
14
4
15
3
16
2
17
1
18
7
8
9
1
1
1
2
2
2
2
2
1
R
G
G
R
T
C
CS
SPI
V
DD
XTAL1
RESET
XTAL2
S
S
I
V
S
S
G
002aab401
GPIO5/DTR
GPIO4/DSR
GPIO3
GPIO2
GPIO1
V
SS
SC16IS750IBS
SC16IS760IBS
Transparent top view
terminal 1
index area
6
13
5
14
4
15
3
16
2
17
1
18
7
8
9
1
1
1
2
2
2
2
2
1
Table 2.
Symbol
Pin description
Pin
TSSOP16
11
Type Description
TSSOP24
1
HVQFN24
22
CTS
I
UART clear to send (active LOW). A logic 0 (LOW) on the CTS
pin indicates the modem or data set is ready to accept transmit
data from the SC16IS740/750/760. Status can be tested by
reading MSR[4]. This pin only affects the transmit and receive
operations when auto CTS function is enabled via the Enhanced
Feature Register EFR[7] for hardware flow control operation.
UART transmitter output. During the local Loopback mode, the
TX output pin is disabled and TX data is internally connected to
the UART RX input.
UART receiver input. During the local Loopback mode, the RX
input pin is disabled and TX data is connected to the UART RX
input internally.
device hardware reset (active LOW)
[1]
Crystal input or external clock input. Functions as a crystal input
or as an external clock input. A crystal can be connected
between XTAL1 and XTAL2 to form an internal oscillator circuit
(see
Figure 15
). Alternatively, an external clock can be
connected to this pin.
Crystal output or clock output. (See also XTAL1.) XTAL2 is used
as a crystal oscillator output.
power supply
I
2
C-bus or SPI interface select. I
2
C-bus interface is selected if
this pin is at logic HIGH. SPI interface is selected if this pin is at
logic LOW.
TX
12
2
23
O
RX
13
3
24
I
RESET
XTAL1
14
15
4
5
1
2
I
I
XTAL2
16
6
3
O
V
DD
I2C/SPI
1
8
7
8
4
5
-
I
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SC16IS750IBS Single UART with I2C-bus-SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support
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