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| 型號： | SC16C850IET |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 收發(fā)器 |
| 英文描述： | 2.5 V to 3.3 V UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and 16 mode or 68 mode parallel bus interface |
| 封裝： | SC16C850IBS<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html<1<Always Pb-free,;SC16C850IBS<SOT617-1 (HVQFN32)|<<http://www.nxp.com/packages/SOT617-1.html< |
| 文件頁數(shù)： | 11/55頁 |
| 文件大?。?/td> | 394K |
| 代理商： | SC16C850IET |
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SC16C850
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 2 — 11 November 2010
11 of 55
NXP Semiconductors
SC16C850
2.5 to 3.3 V UART with 128-byte FIFOs and IrDA encoder/decoder
[1]
These registers are accessible only when LCR[7] is a logic 0.
[2]
These registers are accessible only when LCR[7] is a logic 1.
[3]
Second Special registers are accessible only when EFCR[0] = 1.
[4]
Enhanced Feature Registers are only accessible when LCR = 0xBF.
[5]
First Extra Feature Registers are only accessible when EFCR[2:1] = 01b.
[6]
Second Extra Feature Registers are only accessible when EFCR[2:1] = 10b.
6.4 FIFO operation
6.4.1
32-byte FIFO mode
When all four of these registers (TXINTLVL, RXINTLVL, FLWCNTH, FLWCNTL) in the
‘first extra feature register set’ are empty (0x00) the transmit and receive trigger levels are
set by FCR[7:4]. In this mode the transmit and receive trigger levels are backward
compatible to the SC16C650B (see
Table 6
), and the FIFO sizes are 32 entries. The
transmit and receive data FIFOs are enabled by the FIFO Control Register bit 0 (FCR[0]).
It should be noted that the user can set the transmit trigger levels by writing to the FCR,
but activation will not take place until EFR[4] is set to a logic 1. The receiver FIFO section
includes a time-out function to ensure data is delivered to the external CPU (see
Section 6.8
). Please refer to
Table 11
and
Table 12
for the setting of FCR[7:4].
Table 6.
FCR[7:6]
6.4.2
128-byte FIFO mode
When either TXINTLVL, RXINTLVL, FLWCNTH or FLWCNTL in the ‘first extra feature
register set’ contains any value other than 0x00, the transmit and receive trigger levels are
set by TXINTLVL and RXINTLVL registers. TXINTLVL sets the trigger levels for the
transmit FIFO, and the transmit trigger levels can be set to any value between 1 and 128
with granularity of 1. RXINTLVL sets the trigger levels for the receive FIFO, the receive
trigger levels can be set to any value between 1 and 128 with granularity of 1.
When the effective FIFO size changes (that is, when FCR[0] toggles or when the
combined content of TXINTLVL, RXINTLVL, FLWCNTH and FLWCNTL changes between
equal and unequal to 0x00), both RX FIFO and TX FIFO will be reset (data in the FIFO will
be lost).
Second extra feature register set (CLKPRES, RS485TIME, AFCR2, AFCR1)
[6]
0
1
0
Clock Prescaler
1
0
0
RS-485 turn-around Timer
1
1
0
Additional Feature Control Register 2
1
1
1
Additional Feature Control Register 1
Clock Prescaler
RS-485 turn-around Timer
Additional Feature Control Register 2
Additional Feature Control Register 1
Table 5.
A2
Internal registers decoding
…continued
A0
Read mode
A1
Write mode
Interrupt trigger level and flow control mechanism
FCR[5:4]
INT pin activation
RX
00
8
01
16
10
24
11
28
Negate RTS or
send Xoff
Assert RTS or
send Xon
TX
16
8
24
30
00
01
10
11
8
16
24
28
0
7
15
23
相關(guān)PDF資料 |
PDF描述 |
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| SC16C850LIB | 1.8 V single UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode parallel bus interface |
| SC16C850LIBS | 1.8 V single UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode parallel bus interface |
| SC16C850LIET | 1.8 V single UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA) and 16 mode or 68 mode parallel bus interface |
| SC16C850SVIBS | 1.8 V single UART, 20 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface |
| SC16C850VIBS | 1.8 V single UART, 5 Mbit-s (max.) with 128-byte FIFOs, infrared (IrDA), and XScale VLIO bus interface |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SC16C850IET,115 | 功能描述:UART 接口集成電路 16C 2.5-5V 5MBPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C850IET,151 | 功能描述:UART 接口集成電路 16C 2.5-5V 5MBPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C850IET,157 | 功能描述:UART 接口集成電路 16C 2.5-5V 5MBPS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C850IET-G | 功能描述:UART 接口集成電路 16C 2.5-5V 5MBPS UART 128BFIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
| SC16C850IET-S | 功能描述:UART 接口集成電路 16C 2.5-5V 5MBPS UART 128BFIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel |
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