參數(shù)資料
型號(hào): SC16C750BIBS
廠商: NXP Semiconductors N.V.
元件分類: 收發(fā)器
英文描述: 5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs
封裝: SC16C750BIA44<SOT187-2 (PLCC44)|<<http://www.nxp.com/packages/SOT187-2.html<1<week 41, 2004,;SC16C750BIA44<SOT187-2 (PLCC44)|<<http://www.nxp.com/packages/SOT187-2.html&l
文件頁數(shù): 6/44頁
文件大?。?/td> 212K
代理商: SC16C750BIBS
SC16C750B_5
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 05 — 17 October 2008
6 of 44
NXP Semiconductors
SC16C750B
5 V, 3.3 V and 2.5 V UART with 64-byte FIFOs
CTS
40
33
25
I
Clear to send.
CTS is a modem status signal. Its condition can be
checked by reading bit 4 (CTS) of the Modem Status Register
(MSR). MSR[3] (
CTS) indicates that CTS has changed states
since the last read from the MSR. If the modem status interrupt is
enabled when CTS changes levels and the auto-CTS mode is not
enabled, an interrupt is generated. CTS is also used in the
auto-CTS mode to control the transmitter.
Data bus.
Eight data lines with 3-state outputs provide a
bidirectional path for data, control and status information between
the UART and the CPU.
Data carrier detect.
DCD is a modem status signal. Its condition
can be checked by reading bit 7 (DCD) of the Modem Status
Register (MSR). MSR[3] (
DCD) indicates that DCD has changed
states since the last read from the MSR. If the modem status
interrupt is enabled when DCD changes levels, an interrupt is
generated.
Driver disable.
DDIS is active (LOW) when the CPU is reading
data. When inactive (HIGH), DDIS can disable an external
transceiver.
Data set ready.
DSR is a modem status signal. Its condition can be
checked by reading bit 5 (DSR) of the Modem Status Register. Bit 1
(DDSR) of the MSR indicates DSR has changed levels since the
last read from the MSR. If the modem status interrupt is enabled
when DSR changes levels, an interrupt is generated.
Data terminal ready.
When active (LOW), DTR informs a modem
or data set that the UART is ready to establish communication. DTR
is placed in the active level by setting the DTR bit of the Modem
Control Register. DTR is placed in the inactive level either as a
result of a Master Reset, during Loopback mode operation, or
clearing the DTR bit.
Interrupt.
When active (HIGH), INT informs the CPU that the UART
has an interrupt to be serviced. Four conditions that cause an
interrupt to be issued are: a receiver error, received data that is
available or timed out (FIFO mode only), an empty transmitter
holding register or an enabled modem status interrupt. INT is reset
(deactivated) either when the interrupt is serviced or as a result of a
Master Reset.
not connected
D7 to D0
9, 8, 7,
6, 5, 4,
3, 2
42
52, 51, 50,
48, 46, 45,
43, 42
36
3,2,1,32,
31, 30,
29, 28
-
I/O
DCD
I
DDIS
26
12
-
O
DSR
41
35
26
I
DTR
37
28
22
O
INT
33
23
20
O
n.c.
34
3, 5, 7, 11,
14, 16, 19,
22, 24, 27,
29, 31, 34,
37, 39, 41,
44, 47, 49,
53, 56, 57,
60, 63
30, 25
12
-
OUT1,
OUT2
OUT
38, 35
-
O
Outputs 1 and 2.
These are user-designated output terminals that
are set to the active (LOW) level by setting respective Modem
Control Register (MCR) bits (OUT1 and OUT2). OUT1 and OUT2
are set to inactive the (HIGH) level as a result of Master Reset,
during Loopback mode operations, or by clearing bit 2 (OUT1) or
bit 3 (OUT2) of the MCR.
-
-
23
O
Table 2.
Symbol
Pin description
…continued
Pin
PLCC44 LQFP64
Type
Description
HVQFN32
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SC16C750BIBS,151 功能描述:UART 接口集成電路 1CH. UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C750BIBS,157 功能描述:UART 接口集成電路 16CB 2.5V-5V 1CH RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C750BIBS-F 功能描述:UART 接口集成電路 16CB 2.5V-5V 1CH UART 64B FIFO RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 數(shù)據(jù)速率:3 Mbps 電源電壓-最大:3.6 V 電源電壓-最小:2.7 V 電源電流:20 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:LQFP-48 封裝:Reel
SC16C750BIBS-S 制造商:NXP Semiconductors 功能描述:UART 1-CH 64Byte FIFO 2.5V/3.3V/5V 32-Pin HVQFN EP Tray