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SAF784X_2
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2008
7 of 93
NXP Semiconductors
SAF784x
One chip CD audio device with integrated MP3/WMA decoder
GPIO12
DM_ADDR_10
GPIO13
DM_ADDR_11
GPIO14
DM_ADDR_12
GPIO15
DM_ADDR_13
SDI/GPIO16
DM_ADDR_14
WLCI/GPIO17
DM_ADDR_15
SCLI/GPIO18
VSSD2
VDDD2
DM_ADDR_16
T1/GPIO19
DM_ADDR_17
T2/GPIO20
DM_ADDR_18
T3/GPIO21
DM_ADDR_19
PWM1/CAP1/GPIO22
DM_ADDR_20
PWM2/CAP2/GPIO23
DM_BLS_0
PWM3/CAP3/GPIO24
DM_BLS_1
PWM4/CAP4/GPIO25
DM_WE
MEAS/GPIO26
DM_OE
CFLG/GPIO27
DM_CE_0
CL1/GPIO28
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
B
O
B
O
B
O
B
O
B
O
B
O
B
P
P
O
B
O
B
O
B
O
B
O
B
O
B
O
B
O
B
O
B
O
B
general purpose I/O 12
external memory address bit 10
general purpose I/O 13
external memory address bit 11
general purpose I/O 14
external memory address bit 12
general purpose I/O 15
external memory address bit 13
serial data input (loopback)/general purpose I/O 16
external memory address bit 14
serial word clock input (loopback)/general purpose I/O 17
external memory address bit 15
serial bit clock input (loopback)/general purpose I/O 18
digital core ground 2
digital core supply voltage 2
external memory address bit 16
tacho input 1 (for spindle motor sensor)/general purpose I/O 19
external memory address bit 17
tacho input 2 (for spindle motor sensor)/general purpose I/O 20
external memory address bit 18
tacho input 3 (for spindle motor sensor)/general purpose I/O 21
external memory address bit 19
timer PWM output 1/capture input 1/general purpose I/O 22
external memory address bit 20
timer PWM output 2/capture input 2/general purpose I/O 23
external RAM lower-byte lane select (lower 8-bits)
timer PWM output 3/capture input 3/general purpose I/O 24
external RAM upper byte lane select (upper 8-bits)
timer PWM output 4/capture input 4/general purpose I/O 25
external memory right control
channel decoder telemetry output/general purpose I/O 26
external memory output enable
channel decoder correction statistics/general purpose I/O 27
external memory chip-select Bank 0
clock output for sampling channel decoder telemetry outputs/general purpose
I/O 28
general purpose I/O 29
digital ground 2 to periphery (pads)
power-on reset (active LOW)
digital supply voltage 2 to periphery (pads)
GPIO29
VSSP2
RESET
VDDP2
98
99
100
101
B
P
IUH
P
Table 2.
All digital inputs and bidirectional pins are 5 V tolerant.
Symbol
Pin description
…continued
Pin
Type
[1]
Description