參數(shù)資料
型號(hào): SAA7710T
廠商: NXP Semiconductors N.V.
英文描述: High Quality Audio-Performance Digital Add-On Processor For Digital Sound Systems.(應(yīng)用在數(shù)字聲音系統(tǒng)的高品質(zhì)音頻性能數(shù)字附加處理器)
中文描述: 高品質(zhì)音頻高性能數(shù)字加到了數(shù)字音響系統(tǒng)。(應(yīng)用在數(shù)字聲音系統(tǒng)的高品質(zhì)音頻性能數(shù)字附加處理器處理器)
文件頁數(shù): 6/28頁
文件大?。?/td> 187K
代理商: SAA7710T
1998 Mar 13
6
Philips Semiconductors
Product specification
Dolby* Pro Logic Surround;
Incredible Sound
SAA7710T
A
DDITIONAL INFORMATION
The possible modes of operation are discussed in more
detail in the “SAA7710T Dolby Pro Logic Programming
Guide, Application Note AN95063” This also includes
which features are available for a given system clock
frequency and sample frequency and the possible input
configurations.
Clock circuit and oscillator
The chip has an on board crystal clock oscillator. The block
schematic of this Pierce oscillator is shown in
Figs 3 and 4. The active element needed to compensate
for the loss resistance of the crystal is the amplifier Gm.
This amplifier is placed between the XTAL (output) pin and
the OSC (sense) pin. The gain of the oscillator is internally
controlled by the automatic gain control. This prevents too
much power loss in the crystal. The higher harmonics are
then as low as possible. The signals on the OSC and XTAL
pin are differentially amplified.
The oscillator has these two modes of operation:
The crystal oscillator mode:
in this mode (see Fig.3),
a quartz crystal oscillator is used to generate a clock
signal which is subsequently divided by 2 to ensure that
the final clock signal has a 50% duty cycle.
The oscillator circuit components R
bias
and C1, C2
depend on the crystal. In the case of an overtone
oscillator, the ground harmonic is filtered out by L1 and
C3. Pin SHTCB is held low so that the divided signal is
selected. Only a quartz crystal should be used in this
mode.
The slave oscillator mode:
in this mode (see Fig.4),
the oscillator circuit acts as a slave driven by a master
system clock. The clock divider can be switched on or off
using pin SHTCB. When the divider is not used, the duty
cycle of the clock will depend on the master system
clock duty cycle and the rising and falling edge times.
This places a tolerance of 5% on the 50% duty cycle of
the master system clock (see Chapter “AC
characteristics”).
In order to be able to control the phase of the clock signal
during testing the divider is skipped and the signal is
directly fed to the circuit via the multiplexer in the TEST
position.
S
UPPLY OF THE CRYSTAL OSCILLATOR
The power supply connections to the oscillator are
separated from the other supply lines to minimise
feedback from on-chip ground bounce to the oscillator
circuit. Noise on the power supply affects the AGC
operation so the power supply should be decoupled.
The V
SS_XTAL
pin is used as ground supply and the
V
DD_XTAL
as positive supply.
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