參數(shù)資料
型號: SAA7390GP
廠商: NXP Semiconductors N.V.
英文描述: High performance Compact Disc-Recordable CD-R controller
中文描述: 高性能式光盤CD - R光盤控制器
文件頁數(shù): 7/76頁
文件大?。?/td> 366K
代理商: SAA7390GP
1996 Jul 02
7
Philips Semiconductors
Preliminary specification
High performance Compact
Disc-Recordable (CD-R) controller
SAA7390
UC_AD2
UC_AD3
V
SS6
UC_AD4
UC_AD5
UC_AD6
UC_AD7
V
DD5
UC_LA0
UC_LA1
UC_LA2
V
SS7
UC_LA3
UC_LA4
UC_LA5
UC_LA6
UC_LA7
V
SS8
PCLK
V
DD6
ALE
UC_WR
UC_RD
INT
UC_A8
UC_A9
UC_A10
SYS_SYNC
UC_A11
UC_A12
UC_A13
COM_SYNC
UC_A14
UC_A15
SD0
V
DD6
SD1
SD2
V
SS9
SD3
SD4
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
O
O
O
O
O
O
I
I
I
O
I
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
I/O
I/O
microprocessor multiplexed address/data bus; bit UC_AD2
microprocessor multiplexed address/data bus; bit UC_AD3
ground 6
microprocessor multiplexed address/data bus; bit UC_AD4
microprocessor multiplexed address/data bus; bit UC_AD5
microprocessor multiplexed address/data bus; bit UC_AD6
microprocessor multiplexed address/data bus; bit UC_AD7
power supply 5
latched lower address; bit UC_LA0
latched lower address; bit UC_LA1
latched lower address; bit UC_LA2
ground 7
latched lower address; bit UC_LA3
latched lower address; bit UC_LA4
latched lower address; bit UC_LA5
latched lower address; bit UC_LA6
latched lower address; bit UC_LA7
ground 8
33.8688 MHz microprocessor clock
power supply 6
address latch enable
write enable
read enable
interrupt to microcontroller; active LOW; open drain
upper address; bit UC_A8
upper address; bit UC_A9
upper address; bit UC_A10
system synchronization from basic engine
upper address; bit UC_A11
upper address; bit UC_A12
upper address; bit UC_A13
communication synchronization from basic engine
upper address; bit UC_A14
upper address; bit UC_A15
internal data bus; bit SD0
power supply 6
internal data bus; bit SD1
internal data bus; bit SD2
ground 9
internal data bus; bit SD3
internal data bus; bit SD4
CMOS
SYMBOL
PIN
I/O
TYPE
DESCRIPTION
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