參數(shù)資料
型號： SAA7390GP
廠商： NXP Semiconductors N.V.
英文描述： High performance Compact Disc-Recordable CD-R controller
中文描述： 高性能式光盤CD - R光盤控制器
文件頁數(shù)： 26/76頁
文件大?。?/td> 366K
代理商： SAA7390GP
1996 Jul 02
26
Philips Semiconductors
Preliminary specification
High performance Compact
Disc-Recordable (CD-R) controller
SAA7390
Table 22
GPIOCTL field descriptions
9.1
S2B UART registers
This section describes the registers used for the S2B UART control.
Table 23
S2B UART transmit, receive and status buffer: 0xF0A1, F0A2 and F0A3; note 1
Note
1.
WTS2B is for the transmit data byte from the S2B UART and RDS2B is for the receive data byte from the S2B UART.
Table 24
S2BSTAT field descriptions
FIELD
DESCRIPTION
GPDIR1
General purpose bit direction control. Default LOW puts GPIO1 into the input mode, setting this HIGH
puts GPIO1 in output mode.
GPIO1 data bit.
General purpose bit direction control. Default LOW puts GPIO2 into the input mode, setting this HIGH
puts GPIO2 in output mode.
GPIO2 data bit.
General purpose bit direction control. Default LOW puts GPIO3 into the input mode, setting this HIGH
puts GPIO3 in output mode.
GPIO3 data bit.
General purpose bit direction control. Default LOW puts GPIO4 into the input mode, setting this HIGH
puts GPIO4 in output mode.
GPIO4 data bit.
GPDAT1
GPDIR2
GPDAT2
GPDIR3
GPDAT3
GPDIR4
GPDAT4
MNEMONIC
R/W
DATA BYTE
7
6
5
4
3
2
1
0
WTS2B
RDS2B
S2BSTAT
W
R
R
DATA7
DATA7
DATA6
DATA6
DATA5
DATA5
DATA4
DATA4
DATA3
DATA3
TXDRDY
DATA2
DATA2
PE
DATA1
DATA1
OVRRUN
DATA0
DATA0
RXDRDY
FIELD
DESCRIPTION
RXDRDY
OVRRUN
logic 1 indicates that the receive data is valid
logic 1 indicates that the data in the receive buffer was not read before it was over written by the next
byte
logic 1 indicates that a parity error was detected in the receive data byte; this is usually caused by the
wrong baud rate
logic 1 indicates that the transmit data buffer is empty and ready for another byte
PE
TXDRDY
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