
1996 Jul 02
21
Philips Semiconductors
Preliminary specification
High performance Compact
Disc-Recordable (CD-R) controller
SAA7390
bit location in INTRFLG will clear the corresponding interrupt. If a masked interrupt occurs, the microcontroller can still
detect the occurrence because the event is still posted in INTRFLG.
Table 8
Interrupt mask register: 0xF0FB
Each bit in register 0xF0FB corresponds to the interrupt at the same bit location in register 0xF0FC. To enable an
interrupt, the bit in this register must be set HIGH.
Table 9
Interrupt flag register: F0FC; note 1
Note
1.
If any bit is set in this register an interrupt is sent to the microcontroller. Table 10 shows when the interrupts are
asserted; assuming the corresponding mask bit is set.
Table 10
INTRFLG field descriptions
MNEMONIC
R/W
DATA BYTE
7
6
5
4
3
2
1
0
INTRMSK
R/W
MASK7
MASK6
MASK5
MASK4
MASK3
MASK2
MASK1
MASK0
MNEMONIC
R/W
DATA BYTE
7
6
5
4
3
2
1
0
INTRFLG
R/W
CDB2INT FETXINT
FERXINT
ECC_COR FE_HDR
FE2352
STR_LST FRM_STR
FIELD
DESCRIPTION
FRM_STR
STR_LST
FE_2352
FE_HDR
ECC_COR
RFERXINT
FETXINT
CDB2INT
set one when one complete frame is stored
set at the start of the last frame
set if the front-end data exceeds 2352 bytes
front-end interrupt for header (or Q channel) ready
ECC interrupt for correction complete
front-end interrupt for receive ready
front-end interrupt for transmit ready
CDB2 interrupts: see CSTAT (Table 78) for bit descriptions
8.4
Microcontroller RAM organization
MICFRM# is used to determine the frame address for the
microcontroller access through the frame window
0x8000 to 0x8FFF. To obtain the actual byte location
within the buffer RAM, the lower 12 bits of the
microcontroller address form the relative offset and hence
the absolute address is found.
Note that the microcontroller has the option of addressing
memory in a linear fashion using the 32 kbytes address
space between 0x000 and 0x7FFF. If this 32 kbytes page
is used, the PAGEREG must be programmed with the
required page address. PAGEREG is used to select the
required page when the microcontroller makes a linear
access to the buffer memory using the address space
0x7000 to 0x7FFF. The actual address is the fifteen LSBs
from the microcontroller plus 32768 times the value in
PAGEREG.