
1997 Aug 12
50
Philips Semiconductors
Objective specification
ATAPI CD-R block decoder
SAA7381
7.5.6.2
Auxiliary block memory processor registers
The registers given in Table 85 are located in the Aux
block of the and control the SAA7381 memory processor
buffer management. Transfer to/from the host is possible
as soon as the HOSTBYTECOUNT is non-zero, and the
HOSTCURSEGCNT is non-zero.
The ‘chan0’ and ‘chan1’ bits control the sequencing of
sub-block transfers. They indicate the number of
offset/length pairs to use for each block being transferred.
Normally only channels 0 and 1 are needed for Mode 2
host transfers. Channels 2 and 3 are available for special
READ-CD command options.
An interrupt is associated with HOSTBYTECOUNT
becoming zero. This is an indication to the microcontroller
to reload the HOSTCURSEG and HOSTBYTECOUNT
registers for the next transfer.
The HOSTCURSEG, HOSTBYTEOFFSET and
HOSTBYTECOUNT registers indicate the address of the
next byte to be transferred to or from the host, in order that
the status of the interface may be read. The operation of
the HOSTBYTECOUNT and HOSTBYTEOFFSET
registers is given in Table 85.
Table 85
Host interface DMA pointers
ADDR
ACCESS
NAME
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
FF45H
FF44H
FF66H
FF59H
FF58H
FF5DH
FF5CH
FF51H
FF50H
FF55H
FF54H
FF5BH
FF5AH
FF5FH
FF5EH
FF53H
FF52H
FF57H
FF56H
FF43H
FF42H
FF65H
FF64H
FF69H
FF68H
FF6BH
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
HOSTCURSEG-L
HOSTCURSEG-H
HOSTCURSEGCNT
HOSTSUBBLKOFFSET0-L
HOSTSUBBLKOFFSET0-H
HOSTSUBBLKOFFSET1-L
HOSTSUBBLKOFFSET1-H
HOSTSUBBLKOFFSET2-L
HOSTSUBBLKOFFSET2-H
HOSTNEXTSEG-L
HOSTNEXTSEG-H
HOSTSUBBLKCOUNT0-L
HOSTSUBBLKCOUNT0-H
HOSTSUBBLKCOUNT1-L
HOSTSUBBLKCOUNT1-H
HOSTSUBBLKCOUNT2-L
HOSTSUBBLKCOUNT2-H
HOSTNEXTSEGCOUNT
HOSTRELOADFLAGS
HOSTBYTEOFFSET-L
HOSTBYTEOFFSET-H
HOSTBYTECOUNT-L
HOSTBYTECOUNT-H
HOSTRELSEG-L
HOSTRELSEG-H
AUX_FORM_SCAN
s7
s6
s5
b5
a5
a5
a5
a5
c5
c5
c5
c5
a5
c5
s5
c5
s4
s12
b4
a4
a4
a4
a4
a12
c4
c4
c4
c4
a4
c4
s4
s12
c4
s3
s11
b3
a3
a11
a3
a11
a3
a11
a3
a11
c3
c11
c3
c11
c3
c11
c3
c11
a3
a11
c3
c11
s3
s11
c3
s2
s10
b2
a2
a10
a2
a10
a2
a10
a2
a10
c2
c10
c2
c10
c2
c10
c2
c10
a2
a10
c2
c10
s2
s10
c2
s1
s9
b1
a1
a9
a1
a9
a1
a9
a1
a9
c1
c9
c1
c9
c1
c9
c1
c9
a1
a9
c1
c9
s1
s9
c1
s0
s8
b0
a0
a8
a0
a8
a0
a8
a0
a8
c0
c8
c0
c8
c0
c8
c0
c8
a0
a8
c0
c8
s0
s8
c0
chan1
b7
a7
autoform
a7
autoform
a7
autoform
a7
autoform
c7
c7
c7
c7
rel1
a7
autoform
c7
s7
chan1
c7
chan0
b6
a6
form
a6
form
a6
form
a6
form
c6
c6
c6
c6
rel2
a6
form
c6
s6
chan0
c6