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參數(shù)資料
| 型號： | SAA7377 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Digital servo processor and Compact Disc decoder CD7 |
| 中文描述： | 數(shù)字伺服處理器和CD7抗原光盤解碼器 |
| 文件頁數(shù)： | 8/56頁 |
| 文件大?。?/td> | 311K |
| 代理商： | SAA7377 |
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1998 Jul 06
8
Philips Semiconductors
Product specifications
Digital servo processor and Compact Disc
decoder (CD7)
SAA7377
7
FUNCTIONAL DESCRIPTION
7.1
Decoder part
7.1.1
P
RINCIPLE OPERATIONAL MODES OF THE DECODER
The decoding part operates at single-speed and supports
a full audio specification.
A simplified data flow through the decoder part is
illustrated in Fig.6.
7.1.2
C
RYSTAL FREQUENCY SELECTION
The SAA7377, which has an internal phase-locked loop
clock multiplier, can be used with 33.8688, 16.9344 or
8.4672 MHz crystal frequencies by setting register B and
SELPLL as shown in Table 1. The internal clock multiplier,
controlled by SELPLL, should only be used if a
8.4672 MHz crystal, ceramic resonator or external clock is
present. It should be noted that the CL11 output is a
5.6448 MHz clock if a 16.9344 MHz external clock is used.
Table 1
Crystal frequency selection
7.1.3
S
TANDBY MODES
The SAA7377 may be placed in two standby modes
selected by register B (it should be noted that the device
core is still active)
Standby 1: “CD-STOP” mode. Most I/O functions are
switched off.
Standby 2: “CD-PAUSE” mode. Audio output features
are switched off, but the motor loop, the motor output
and the subcode interfaces remain active. This is also
called a “Hot Pause”.
In the standby modes the various pins will have the
following values;
MOTO1 and MOTO2: put in high-impedance, PWM
mode (standby 1 and RESET, operating in standby 2).
Put in high-impedance, PDM mode (standby 1 and
RESET, operating in standby 2).
SCL, SDA, SILD and RAB: no interaction. Normal
operation continues.
SCLK, WCLK, DATA, CL11 and DOBM: 3-state in both
standby modes. Normal operation continues after reset.
REGISTER B
SELPLL
CRYSTAL FREQUENCY
(MHz)
00xx
00xx
01xx
0
1
0
33.8688
8.4672
16.9344
CRIN, CROUT, CL16 and CL4: no interaction. Normal
operation continues.
V1, V2, V3, V4, V5, CFLG and C2FAIL: no interaction.
Normal operation continues.
7.2
Crystal oscillator
The crystal oscillator is a conventional 2 pin design
operating between 8 and 35 MHz. This oscillator is
capable of operating with ceramic resonators and also with
both fundamental and third overtone crystals. External
components should be used to suppress the fundamental
output of the third overtone crystals as shown in Figs 3
and 4. Typical oscillation frequencies required are 8.4672,
16.9344 or 33.8688 MHz depending on the internal clock
settings used and whether or not the clock multiplier is
enabled.
Fig.3 8.4672 MHz fundamental configuration.
8.4672 MHz
CRIN
CROUT
SAA7377
22 pF
22 pF
330
100 k
OSCILLATOR
MGR293
Fig.4 33.8688 MHz overtone configuration.
OSCILLATOR
33.8688 MHz
CRIN
CROUT
SAA7377
3.3
μ
H
1 nF
10 pF
10 pF
330
100 k
MGR294
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相關(guān)代理商/技術(shù)參數(shù) |
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| SAA7377GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Digital servo processor and Compact Disc decoder CD7 |
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| SAA7378GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Single Chip Digital Servo Processor and Compact Disc Decoder |
| SAA7380 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Error correction and host interface IC for CD-ROM ELM |
| SAA7380GP | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Error correction and host interface IC for CD-ROM ELM |
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