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參數(shù)資料
| 型號： | SAA7356HL |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 1394 SBP-2 link layer controller |
| 中文描述： | 1 CHANNEL(S), SERIAL COMM CONTROLLER, PQFP80 |
| 封裝： | PLASTIC, QFP-80 |
| 文件頁數(shù)： | 22/36頁 |
| 文件大?。?/td> | 157K |
| 代理商： | SAA7356HL |
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2000 Nov 17
22
Philips Semiconductors
Preliminary specification
1394 SBP-2 link layer controller
SAA7356HL
Notes
1.
ATA Multi-word Direct Memory Access (MDMA) protocol with all timing based on an internal DMA interface 50 MHz
system clock.
MICRO_ALE must pulse to capture a new register address for the Intel 8031 and the NEC V851 modes.
t
10
must also be satisfied.
If MICRO_READ is held LOW, the time from MICRO_CS LOW to stable data is t
5
and the data release time from
MICRO_CS HIGH is t
11
.
This is larger than the typical read strobe timing. To meet these requirements, either the microcontroller clock will be
stopped by the buffer manager device, or the microcontroller must insert its own wait states.
t
5
must also be satisfied.
If MICRO_WRITE is held LOW, data set-up to MICRO_CS HIGH is t
15
and data hold from MICRO_CS is t
16
.
t
3
minimum = 2
×
3t
CP
+ 5 for successive FIFO reads or a FIFO read or write followed by a read of the FIFO flag
registers.
This time relates to accesses to addresses other than
RAM.Next
and
RAM.Current
.
10. This time relates to accesses to the addresses
RAM.Next
and
RAM.Current
.
2.
3.
4.
5.
6.
7.
8.
9.
P
HY
-
LINK INTERFACE TIMING
; see Figs 14 and 15
t
1
t
2
t
3
R
EGISTER INTERFACE TIMING
; see Figs 16, 17, 18, 19, 20, 21 and 22
PHY-Link set-up time
PHY-Link hold time
PHY-Link output delay
6
0
2
10
ns
ns
ns
t
1
t
2
t
3
t
4
t
5
t
6
t
7
t
8
t
9
t
10
t
11
t
12
t
13
t
14
t
15
t
16
t
17
t
18
address set-up to MICRO_ALE LOW
address hold from MICRO_ALE LOW
MICRO_ALE pulse width
MICRO_ALE LOW to MICRO_CS LOW
MICRO_CS LOW to data valid
MICRO_CS HIGH to MICRO_ALE HIGH
MICRO_CS set-up to MICRO_READ LOW
MICRO_READ pulse width
MICRO_READ HIGH to MICRO_CS HIGH
MICRO_READ LOW to data valid
MICRO_READ HIGH to data bus disable
MICRO_CS set-up to MICRO_WRITE LOW
MICRO_WRITE pulse width
MICRO_WRITE HIGH to MICRO_CS HIGH
data set-up to MICRO_WRITE HIGH
data hold from MICRO_WRITE HIGH
MICRO_WRITE HIGH to MICRO_ALE HIGH
MICRO_WRITE HIGH to MICRO_WRITE HIGH
10
10
20
10
0
0
280
0
2
0
30
0
15
4
t
CP
+ 5
280
460
280
280
30
4
20
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
note 2
note 3
note 4
note 5
note 4
note 6
note 7
note 7
note 8
note 9
note 10
t
19
t
20
MICRO_READ LOW to MICRO_WAIT LOW
data valid to MICRO_WAIT HIGH
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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