參數(shù)資料
型號(hào): SAA7146AHZ
廠商: NXP SEMICONDUCTORS
元件分類: 消費(fèi)家電
英文描述: Circular Connector; No. of Contacts:66; Series:MS27472; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:18; Circular Contact Gender:Pin; Circular Shell Style:Wall Mount Receptacle; Insert Arrangement:18-35 RoHS Compliant: No
中文描述: SPECIALTY CONSUMER CIRCUIT, PQFP208
封裝: PLASTIC, SOT-316, SQFP-208
文件頁(yè)數(shù): 82/144頁(yè)
文件大小: 645K
代理商: SAA7146AHZ
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1998 Apr 09
82
Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
Table 62
YUV 4 : 2 : 2 format
Table 63
YUV 4 : 1 : 1 format
The following formats are planar YUV formats and use the three video FIFOs and three video DMA Channels 1, 2 and 3.
The byte phase of the first sample each line is defined by the 2 LSBs of every DMA base.
YUV 4 : 4 : 4; U and V sampled with every Y sample
YUV 4 : 2 : 2; U and V sampled co-sided with first Y sample (of 2 samples in-line)
YUV 4 : 2 : 0; MPEG U and V sampled at upper left sample of 4 sample in square (2
×
2)
YUV-9 video; U and V sampled at selected sample of 16 samples in-square (4
×
4)
YUV1; YUYV, YUYV...
YUV2; YYUU, YYVV...
7.11.1.3
8-bit formats
Y8G
; Only Y or inverted Y
α
8
; 8-bit alpha information, to be master-read through FIFO 2 and merged into RGB-24 with alpha.
There are two pseudo CLUT formats, which derives its bits from RGB-24 or YUV-24 by truncation, or by error diffusion
dither. The byte phase of the first sample each field is defined by 2 LSBs of DMA base.
RGB-8 (3 : 3 : 2); Red has 3 bits, Green has 3 bits, Blue has 2 bits
YUV8 (4 : 2 : 2); Y has 4 bits, U has 2 bits, V has 2 bits. Y = 0 doesn’t exist, to handle 16-bit colour formats for pseudo
CLUT. After dithering, Y
min
= 1.
All 8-bit formats are packed formats, 4 samples go into one Dword. The byte phase of the first sample of each line is
defined by the 2 LSBs of the DMA base. All except
α
8 use FIFO 1.
Table 64
8-bit formats
PACKING WITHIN 32-BIT Dword
BIT 31 TO BIT 24
BIT 23 TO BIT 16
BIT 15 TO BIT 8
BIT 7 TO BIT 0
Y
1
V
0
Y
0
U
0
BUS CYCLE
PACKING WITHIN 32-BIT Dword
BIT 31 TO BIT 24
BIT 23 TO BIT 16
BIT 15 TO BIT 8
BIT 7 TO BIT 0
1
2
3
Y
1
Y
3
Y
7
V
0
V
4
V
6
Y
0
Y
2
Y
5
U
0
U
4
Y
4
PACKING WITHIN 32-BIT Dword
BIT 31 TO BIT 24
BIT 23 TO BIT 16
BIT 15 TO BIT 8
BIT 7 TO BIT 0
pixel
3
pixel
2
pixel
1
pixel
0
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