參數(shù)資料
型號(hào)： SAA7140B
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： High Performance Scaler HPS
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP128
文件頁數(shù)： 54/68頁
文件大小： 432K
代理商： SAA7140B
1996 Sep 04
54
Philips Semiconductors
Objective specification
High Performance Scaler (HPS)
SAA7140A; SAA7140B
Table 62
X (horizontal) prescaler accumulation mode of accumulating FIR; data bit XACM
Table 63
Coefficient select for X prescaler (luminance component Y); data bits CXY7 to CXY0
Table 64
Coefficient select for X prescaler (colour difference signals UV); data bits CXUV7 to CXUV0
Table 65
Prefilter selection for luminance component Y (note 1); data bits PFY3 to PFY0 (13H to 33H)
Note
1.
H(z) = H1(z)
×
H2(z)
×
H3(z) with H1 and H3 = 1 + z
1
; H2 = 1 + A
×
z
1
+ z
2
and A = 2,
15
16
,
7
8
,
3
4
for PFY3 and
PFY2 = 00, 01, 10, 11.
Table 66
Prefilter selection for colour difference signals UV (note 1); data bits PFUV3 to PFUV0
Note
1.
H(z) = H1(z)
×
H2(z)
×
H3(z) with H1 = 1 + z
1
; H2 = 1 + A
×
z
1
+ z
2
; H3 = 1 + z
2
and A = 2,
15
16
,
7
8
,
3
4
for
PFUV3 and PFUV2 = 00, 01, 10, 11.
Table 67
Accumulation sequence length of the Y (vertical) processing; data bits YACL5 to YACL0
XACM
DESCRIPTION
0
1
accumulating operates overlapping
non overlapping accumulation (must be set to bypass the prescaler)
CXY7 to CXY0
DESCRIPTION
11H to 31H
for DC gain compensation of prescaler the accumulated pixels can be weighted by 1 or 2. CXYi
defines a sequence of 8 bits, which control the coefficients; when CXYi = 0 pixel weighted by 1
and when CXYi = 1 pixel weighted by 2
CXUV7 to CXUV0
DESCRIPTION
12H to 32H
for DC gain compensation of prescaler the accumulated pixels can be weighted by 1 or 2. CXUVi
defines a sequence of 8 bits, which control the coefficients; when CXUVi = 0 pixel weighted by 1
and when CXUVi = 1 pixel weighted by 2
PFY1
PFY0
≥
0
1
0
1
H1(z)
H2(z)
H3(z)
0
0
1
1
bypass
active
active
active
bypass
bypass
bypass
active
bypass
bypass
active
active
PFUV1
PFUV0
≥
0
1
0
1
H1(z)
H2(z)
H3(z)
0
0
1
1
bypass
active
active
active
bypass
bypass
active
active
bypass
bypass
bypass
active
YACL5 to YACL0
DESCRIPTION
14H to 34H
defines vertical accumulation sequence length of input lines. If accumulation FIR filter mode is
selected (YACM), YACL has to fit to the vertical scaling factor (defined by YSCI9 to YSCI0)
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