參數(shù)資料
型號(hào)： SAA7140B
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： High Performance Scaler HPS
中文描述： SPECIALTY CONSUMER CIRCUIT, PQFP128
文件頁(yè)數(shù)： 26/68頁(yè)
文件大?。?/td> 432K
代理商： SAA7140B
1996 Sep 04
26
Philips Semiconductors
Objective specification
High Performance Scaler (HPS)
SAA7140A; SAA7140B
1
18
17
1111 1111 1 1 1 1111 1111
1222 1222 1 2 1 2221 2221
1222 2112 2 2 2 2112 2221
....
1111 ... 1111
....
....
....
00
EE
9F
....
00
....
....
....
19
4
32
4
32
4
xx
4
34
8
xx
8
....
....
2
3
3
....
2
....
....
....
16
19
1
1
....
....
....
....
....
1
33
....
1
63
1
64
....
32
....
62
63
HORIZONTAL
PRESCALING
XPSC
COEFFICIENT SEQUENCE
(example)
CXY (luma)/
CXUV (chroma)
(HEX)
WEIGHT
SUM
DCGX
BSC
(CONT/SAT)
= x/y
×
64
7.4.2
V
ERTICAL SCALER
The vertical scaler performs the vertical downscaling of the
input data stream to a random number of output lines.
It can be used for input line lengths up to 768 pixels/line
and has to be bypassed if the input line length exceeds the
pixel count.
For vertical scaling there are two different modes
implemented; the ACCU mode (vertical accumulation) for
scales down to icon size and the Linear Phase
Interpolation mode (LPI) for scales between 1 and
1
2
.
7.4.2.1
ACCU mode (scaling factor range 1 to 1/1024;
I
2
C-bus bit YACM = 1:
The ACCU mode can be used for vertical scaling down to
icon size. In this mode, the I
2
C-bus parameter YSCI
controls the scaling and parameter YACL controls the
vertical anti-alias filtering.
The output lines are generated by a scale-dependent
variable averaging (YACL + 2) input lines. In this way a
vertical FIR filter can be created for anti-aliasing, with up to
65 taps (max.).
YSCI defines the output line qualifier pattern and YACL
defines the sequence length for the line averaging.
For accurate processing, the sequence has to fit into the
qualifying pattern. In the event of mis-programming YACL
unexpected line dropping occurs; where N
OL
= number of
output lines and N
IL
= number of input lines. The I
2
C-bus
bits YSCI (scaling increment), YACL (accumulation length;
optimum: 1 line overlap) and YP (scaling start phase) have
to be set according to the following equations (see Fig.15):
;
accumulation sequence length: i.e. the number of lines per
sequence that are not part of overlay region of
neighbouring sequences (optimum 1 line overlapped).
1
N
–
N
IL
16
; scaling increment.
; scaling start phase (fix; modified in
LPI mode only).
In order to obtain unity amplitude gain for all sequence
lengths and to improve the vertical scaling performance,
the accumulated lines can be weighted and the amplitude
of the scaled output signal has to be renormalized. In the
given example (see Fig.15) using the optimum weighting,
the gain of a sequence results in 1 + 2 + 2 + 1 = 6.
Renormalization (factor 1/6) can be achieved;
By gain reduction using BCS control (brightness,
contrast and saturation) down to
4
6
and a selecting
factor of
1
4
for DCGY2 to DCGY0 (see Section 8.3),
which may result in a loss of signal quantization, or
By gain emphasizing using BCS control up to
8
6
and
selecting a factor of
1
8
for DGY2 to DCGY0 which may
result in a loss of signal detail, due to limiting in the BCS
control.
Normally the weighting would be 2 + 2 + 2 + 2. In this
situation the gain can be renormalized with DCGY2
to DCGY0 = 010 (factor
1
8
).
Table 2 gives examples for I
2
C-bus register settings,
depending on a given scale ratio.
YACL
TRUNC
N
N
OL
1
–
-------------------
×
=
YSCI
INT 1024
-------------------
×
=
YP
INT
YSCI
=
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