參數(shù)資料
型號(hào): S71GL064A08BFI0B2
廠商: SPANSION LLC
元件分類: 存儲(chǔ)器
英文描述: Stacked Multi-Chip Product (MCP) Flash Memory and RAM
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA56
封裝: 7 X 9 MM, 1.20 MM HEIGHT, LEAD FREE, FBGA-56
文件頁數(shù): 7/134頁
文件大?。?/td> 2383K
代理商: S71GL064A08BFI0B2
102
S71GL064A based MCPs
S71GL064A_00_A2 February 8, 2005
Advance
Info rmation
pSRAM Type 7
16Mb (1M word x 16-bit)
32Mb (2M word x 16-bit)
64Mb (4M word x 16-bit)
CMOS 1M/2M/4M-Word x 16-bit Fast Cycle Random Access Memory with Low
Power SRAM Interface
Features
Asynchronous SRAM Interface
Fast Access Time
— tCE = tAA = 60ns max (16M)
— tCE = tAA = 65ns max (32M/64M)
8 words Page Access Capability
— tPAA = 20ns max (32M/64M)
Low Voltage Operating Condition
— VDD = +2.7V to +3.1V
Wide Operating Temperature
— TA = -30°C to +85°C
Byte Control by LB and UB
Various Power Down modes
— Sleep (16M)
— Sleep, 4M-bit Partial, or 8M-bit Partial (32M)
— Sleep, 8M-bit Partial, or 16M-bit Partial (64M)
Pin Description
Pin Name
Description
A21 to A0
Address Input: A19 to A0 for 16M, A20 to A0 for 32M, A21 to A0 for 64M
CE1#
Chip Enable (Low Active)
CE2#
Chip Enable (High Active)
WE#
Write Enable (Low Active)
OE#
Output Enable (Low Active)
UB#
Upper Byte Control (Low Active)
LB#
Lower Byte Control (Low Active)
DQ16-9
Upper Byte Data Input/Output
DQ8-1
Lower Byte Data Input/Output
VDD
Power Supply
VSS
Ground
相關(guān)PDF資料
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S71GL064A08BFI0B3 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFI0F3 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFW0B2 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
S71GL064A08BFW0B3 Stacked Multi-Chip Product (MCP) Flash Memory and RAM
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