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參數(shù)資料
| 型號： | S29GL128P10TFIV10 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology |
| 中文描述： | 128M X 1 FLASH 3V PROM, 100 ns, PDSO56 |
| 封裝： | 20 X 14 MM, LEAD FREE, MO-142EC, TSOP-56 |
| 文件頁數(shù)： | 29/80頁 |
| 文件大?。?/td> | 2706K |
| 代理商： | S29GL128P10TFIV10 |
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November 20, 2009 S29GL-P_00_A12
S29GL-P MirrorBit Flash Family
35
Data
She e t
7.7.7
Accelerated Program
Accelerated single word programming and write buffer programming operations are enabled through the
WP#/ACC pin. This method is faster than the standard program command sequences.
Note
The accelerated program functions must not be used more than 10 times per sector.
If the system asserts VHH on this input, the device automatically enters the aforementioned Unlock Bypass
mode and uses the higher voltage on the input to reduce the time required for program operations. The
system can then use the Write Buffer Load command sequence provided by the Unlock Bypass mode. Note
that if a “Write-to-Buffer-Abort Reset” is required while in Unlock Bypass mode, the full 3-cycle RESET
command sequence must be used to reset the device. Removing VHH from the ACC input, upon completion
of the embedded program operation, returns the device to normal operation.
Sectors must be unlocked prior to raising WP#/ACC to VHH.
The WP#/ACC pin must not be at VHH for operations other than accelerated programming, or device
damage may result.
It is recommended that WP#/ACC apply VHH after power-up sequence is completed. In addition, it is
recommended that WP#/ACC apply from VHH to VIH/VIL before powering down VCC/VIO.
7.7.8
Unlock Bypass
This device features an Unlock Bypass mode to facilitate shorter programming commands. Once the device
enters the Unlock Bypass mode, only two write cycles are required to program data, instead of the normal
four cycles.
This mode dispenses with the initial two unlock cycles required in the standard program command sequence,
resulting in faster total programming time. The Command Definitions on page 68 shows the requirements for
the unlock bypass command sequences.
During the unlock bypass mode, only the Read, Program, Write Buffer Programming, Write-to-Buffer-Abort
Reset, Unlock Bypass Sector Erase, Unlock Bypass Chip Erase and Unlock Bypass Reset commands are
valid. To exit the unlock bypass mode, the system must issue the two-cycle unlock bypass reset command
sequence. The first cycle address is “don't care” and the data 90h. The second cycle need only contain the
data 00h. The sector then returns to the read mode.
Software Functions and Sample Code
The following are C source code examples of using the unlock bypass entry, program, and exit functions.
Refer to the Spansion Low Level Driver User’s Guide (available soon on www.spansion.com) for general
information on Spansion Flash memory software development guidelines.
/* Example: Unlock Bypass Entry Command
*/
*( (UINT16 *)base_addr + 0x555 ) = 0x00AA;
/* write unlock cycle 1
*/
*( (UINT16 *)base_addr + 0x2AA ) = 0x0055;
/* write unlock cycle 2
*/
*( (UINT16 *)base_addr + 0x555 ) = 0x0020;
/* write unlock bypass command
*/
/* At this point, programming only takes two write cycles.
*/
/* Once you enter Unlock Bypass Mode, do a series of like
*/
/* operations (programming or sector erase) and then exit
*/
/* Unlock Bypass Mode before beginning a different type of
*/
/* operations.
*/
Table 7.14 Unlock Bypass Entry
(LLD Function = lld_UnlockBypassEntryCmd)
Cycle
Description
Operation
Byte Address
Word Address
Data
1
Unlock
Write
Base + AAAh
Base + 555h
00AAh
2
Unlock
Write
Base + 555h
Base + 2AAh
0055h
3
Entry Command
Write
Base + AAAh
Base + 555h
0020h
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