參數(shù)資料
型號(hào): S29GL128P10TFIR10
廠商: SPANSION LLC
元件分類: PROM
英文描述: 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology
中文描述: 128M X 1 FLASH 3V PROM, 100 ns, PDSO56
封裝: 20 X 14 MM, LEAD FREE, MO-142EC, TSOP-56
文件頁數(shù): 75/80頁
文件大?。?/td> 2706K
代理商: S29GL128P10TFIR10
November 20, 2009 S29GL-P_00_A12
S29GL-P MirrorBit Flash Family
77
Data
She e t
14. Revision History
Section
Description
Revision A0 (October 29, 2004)
Initial Release.
Revision A1 (October 20, 2005)
Global
Revised all sections of document.
Revision A2 (October 19, 2006)
Global
Revised all sections of document. Reformatted document to new template. Changed speed options
for S29GL01GP.
Revision A3 (November 21, 2006)
AC Characteristics
Erase and Program Operations table: Changed tBUSY to a maximum specification.
Revision A4 (December 18, 2006)
Global
Changed tACC, tCE specifications on 128 Mb, 256 Mb, and 512 Mb devices. Added 90 and 100 ns
speed options.
Write Buffer Programming, Sector
Erase
Write Buffer Programming Operation, Sector Erase Operation figures: Deleted “Wait 4 ms” box from
flowcharts.
Password Protection Method
Lock Register Program Algorithm figure: Deleted “Wait 4 ms” box from flowchart.
Read-only Operations table
Modified tRC, tACC, tCE, tOE specifications.
Program and Erase Operations tables
Changed tDS specification, deleted write cycle time note.
TSOP Pin and BGA Capacitance table
Changed all specifications in table.
Revision A5 (May 18, 2007)
Global
Changed data sheet status to Preliminary.
Deleted references to requirement for external WP# pull-up.
Performance Characteristics
Max. Read Access Times table: Added note.
Hardware Reset
Deleted note from section.
AC Characteristics
Reset Timings figure: Deleted note.
Command Definitions tables
S29GL-P Sector Protection Command Definitions tables: Changed “Global Non-Volatile Freeze” to
“Global Volatile Freeze”.
DC Characteristics
CMOS Compatible table: Changed ICC1 maximum current for 5 MHz and MHz test conditions.
Page Read Timings figure
Corrected address range for top waveform.
Revision A6 (October 23, 2007)
Performance Characteristics
Changed speed options for S29GL512P
Ordering Information
Corrected samples OPN valid combinations; changed speed options for S29GL512P
64-Ball Fortified BGA
Clarified ball “D1” connection
56-Pin TSOP
Clarified pin “30” connection
Autoselect
Added recommendation statement
Accelerated Program
Added recommendation statement
Persistent Protection Bits
Removed “Erase” from title and flow chart
Secured Silicon Sector
Sections “Factory Locked Secured Silicon Sector” & “Customer Lockable Secured Silicon Sector”:
clarified shipping options
Power-up Sequence Timing
Changed tRH from “Max” to “Min” value
Advance Information on S29GL-R
65 nm MirrorBit Hardware Reset
(RESET#) and Power-up Sequence
Added section
Global
Fixed cross-references that were not live hyperlinks.
Revision A7 (November 8, 2007)
Advance Information on S29GL-R 65
nm MirrorBit Hardware Reset (RESET#)
and Power-up Sequence
Changed timing specs and waveforms
相關(guān)PDF資料
PDF描述
S29GL128P10TFIV10 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology
S29GL032N90BFI32 2M X 16 FLASH 3V PROM, 90 ns, PBGA48
S2A SURFACE MOUNT RECTIFIER
S2B SURFACE MOUNT RECTIFIER
S2C1R-1-5-H 4000 MHz - 8000 MHz RF/MICROWAVE SGL POLE DOUBLE THROW SWITCH, 1.7 dB INSERTION LOSS
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