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參數(shù)資料
| 型號(hào)： | S29CD016G0MFAM110 |
| 廠商： | Spansion Inc. |
| 英文描述： | 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O |
| 中文描述： | 32兆位（1米× 32位），16兆位（512k × 32的位），2.5伏，只有突發(fā)模式，雙啟動(dòng)，同步讀/寫閃存與VersatileI內(nèi)存/輸出 |
| 文件頁數(shù)： | 27/87頁 |
| 文件大?。?/td> | 792K |
| 代理商： | S29CD016G0MFAM110 |
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November 14, 2005 S29CD-G_00_B0
S29CD-G Flash Family
25
P r e l i m i n a r y
An erase operation can erase one sector, multiple sectors, or the entire device.
Table 23
,
Table 24
,
Table 25
, and
Table 26
indicate the address space that each sector occupies. A
sector address
consists of the address bits required to uniquely select a sector. See
Command Definitions
on
page 42
for details on erasing a sector or the entire chip, or suspending/resuming the erase
operation.
When in Synchronous read mode configuration, the device is able to perform both asynchronous
and synchronous write operations. CLK and ADV# address latch is supported in synchronous pro-
gramming mode. During a synchronous write operation, to write a command or command
sequence, (which includes programming data to the device and erasing sectors of memory), the
system must drive ADV# and CE# to VIL, and OE# to VIH when providing an address to the de-
vice, and drive WE# and CE# to VIL, and CE# to VIH, when writing commands or data.
Accelerated Program and Erase Operations
The device offers accelerated program/erase operations through the ACC pin. When the system
asserts V
HH
(12V) on the ACC pin, the device automatically enters the Unlock Bypass mode. The
system may then write the two-cycle Unlock Bypass program command sequence to do acceler-
ated programming. The device uses the higher voltage on the ACC pin to accelerate the operation.
A sector that is being protected with the WP# pin is protected during accelerated program or
Erase.
Note:
The ACC pin must not be at V
HH
during any operation other than accelerated programming, or device damage can
result.
Autoselect Functions
If the system writes the autoselect command sequence, the device enters the autoselect mode.
The system can then read autoselect codes from the internal register (which is separate from the
memory array) on DQ7–DQ0. Standard read cycle timings apply in this mode. See
Autoselect
Mode
on page 26
and
Autoselect Command
on page 43
for more information.
Automatic Sleep Mode (ASM)
The automatic sleep mode minimizes Flash device energy consumption. While in asynchronous
mode, the device automatically enables this mode when addresses remain stable for t
ACC
+ 60
ns. The automatic sleep mode is independent of the CE#, WE# and OE# control signals. Standard
address access timings provide new data when addresses are changed. While in sleep mode, out-
put data is latched and always available to the system. While in synchronous mode, the device
automatically enables this mode when either the first active CLK level is greater than t
ACC
or the
CLK runs slower than 5 MHz. Note that a new burst operation is required to provide new data.
I
CC8
in
DC Characteristics
on page 64
represents the automatic sleep mode current specification.
Standby Mode
When the system is not responding or writing to the device, it can place the device in the standby
mode. In this mode, current consumption is greatly reduced, and the outputs are placed in the
high impedance state, independent of the OE# input.
The device enters the CMOS standby mode when the CE# and RESET# inputs are both held at
Vcc
±
0.2 V. The device requires standard access time (t
CE
) for read access, before it is ready to
read data.
If the device is deselected during erasure or programming, the device draws active current until
the operation is completed.
I
CC5
in
DC Characteristics
on page 64
represents the standby current specification.
Caution
: entering the standby mode via the RESET# pin also resets the device to the read mode
and floats the data I/O pins. Furthermore, entering I
CC7
during a program or erase operation
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S29CD016G0MFAM112 | 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O |
| S29CD016G0MFAM200 | 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O |
| S29CD016G0MFAM202 | 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O |
| S29CD016G0MFAM210 | 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O |
| S29CD016G0MFAM212 | 32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29CD016G0MFAM112 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O |
| S29CD016G0MFAM200 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O |
| S29CD016G0MFAM202 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O |
| S29CD016G0MFAM210 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O |
| S29CD016G0MFAM212 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:32 Megabit (1M x 32-Bit), 16 Megabit (512K x 32-Bit) 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/ Write Flash Memory with VersatileI/O |
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