參數(shù)資料
型號(hào)： S25L004A0LMAI003
廠商： SPANSION LLC
元件分類： PROM
英文描述： 4M X 1 FLASH 3V PROM, PDSO8
封裝： 0.208 INCH, PLASTIC, SOP-8
文件頁(yè)數(shù)： 9/39頁(yè)
文件大?。?/td> 945K
代理商： S25L004A0LMAI003
March 28, 2005 S25FL004A_00_A1
S25FL Family (Serial Peripheral Interface) S25FL004A
15
Ad va nc e
In forma t i o n
Table 4. Instruction Set
Write Enable (WREN)
The Write Enable (WREN) instruction (Figure 4) sets the Write Enable Latch
(WEL) bit. The Write Enable Latch (WEL) bit must be set prior to every Page Pro-
gram (PP), Erase (SE or BE) and Write Status Register (WRSR) instruction. The
Write Enable (WREN) instruction is entered by driving Chip Select (CS#) Low,
sending the instruction code, and then driving Chip Select (CS#) High.
Figure 4. Write Enable (WREN) Instruction Sequence
Instruction
Description
One-Byte Instruction
Code
Address
Bytes
Dummy
Byte
Data Bytes
Status Register Operations
WREN
Write Enable
06H (0000 0110)
0
WRDI
Write Disable
04H (0000 0100)
0
RDSR
Read from Status Register
05H (0000 0101)
0
1 to Infinity
WRSR
Write to Status Register
01H (0000 0001)
0
1
Read Operations
READ
Read Data Bytes
03H (0000 0011)
3
0
1 to Infinity
FAST_READ
Read Data Bytes at Higher Speed
0BH (0000 1011)
3
1
1 to Infinity
RDID
Read Identification
9FH (1001 1111)
0
1 to 3
Erase Operations
SE
Sector Erase
D8H (1101 1000)
3
0
BE
Bulk (Chip) Erase
C7H (1100 0111)
0
Program Operations
PP
Page Program
02H (0000 0010)
3
0
1 to 256
Deep Power Down Savings Mode Operations
DP
Deep Power Down
B9H (1011 1001)
0
RES
Release from Deep Power Down
ABH (1010 1011)
0
Release from Deep Power Down and
Read Electronic Signature
ABH (1010 1011)
0
3
1 to Infinity
CS#
SCK
SI
SO
High Impedance
Instruction
01
2 3
4 5 67
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