參數(shù)資料
型號(hào)： S25L004A0LMAI003
廠商： SPANSION LLC
元件分類(lèi)： PROM
英文描述： 4M X 1 FLASH 3V PROM, PDSO8
封裝： 0.208 INCH, PLASTIC, SOP-8
文件頁(yè)數(shù)： 6/39頁(yè)
文件大?。?/td> 945K
代理商： S25L004A0LMAI003
12
S25FL Family (Serial Peripheral Interface) S25FL004A
S25FL004A_00_A1 March 28, 2005
Ad va n c e
In f o rm a t i o n
The Hold condition ends on the rising edge of the Hold (HOLD#) signal, provided
that this coincides with Serial Clock (SCK) being Low.
If the falling edge does not coincide with Serial Clock (SCK) being Low, the Hold
condition starts after Serial Clock (SCK) next goes Low. Similarly, if the rising
edge does not coincide with Serial Clock (SCK) being Low, the Hold condition ends
after Serial Clock (SCK) next goes Low (Figure 3). During the Hold condition, the
Serial Data Output (SO) is high impedance, and Serial Data Input (SI) and Serial
Clock (SCK) are Don’t Care.
Normally, the device remains selected, with Chip Select (CS#) driven Low, for the
entire duration of the Hold condition. This ensures that the internal logic state re-
mains unchanged from the moment of entering the Hold condition.
If Chip Select (CS#) goes High while the device is in the Hold condition, this has
the effect of resetting the device’s internal logic. To restart communication with
the device, it is necessary to drive Hold (HOLD#) High, and then to drive Chip
Select (CS#) Low. This prevents the device from going back to the Hold condition.
Figure 3. Hold Condition Activation
SCK
HOLD#
Hold
Condition
(standard use)
Hold
Condition
(non-standard use)
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