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參數(shù)資料
| 型號： | RM5231A |
| 廠商： | PMC-Sierra, Inc. |
| 英文描述： | RM5231A⑩ Microprocessor with 32-Bit System Bus Data Sheet Preliminary |
| 中文描述： | RM5231A⑩微處理器與32位系統(tǒng)總線的數(shù)據(jù)資料的初步 |
| 文件頁數(shù)： | 28/40頁 |
| 文件大?。?/td> | 595K |
| 代理商： | RM5231A |
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Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
Document ID: PMC-2002174, Issue 2
28
RM5231A Microprocessor with 32-Bit System Bus Data Sheet
Preliminary
Table 6 Clock/Control Interface
Table 7 Interrupt Interface
Table 8 JTAG Interface
Pin Name
Type
Description
SysClock
Input
System Clock
Master clock input used as the system interface reference clock. All
output timings are relative to this input clock. Pipeline operation
frequency is derived by multiplying this clock up by the factor selected
during boot initialization.
Quiet Vcc for PLL
Quiet Vcc for the internal phase locked loop. Must be connected to
VccInt through a filter circuit.
Quiet Vss for PLL
Quiet Vss for the internal phase locked loop. Must be connected to Vss
through a filter circuit.
VccP
Input
VssP
Input
Pin Name
Type
Description
Int[5:0]*
Input
Interrupt
Six general processor interrupts, bit-wise ORed with bits 5:0 of the
interrupt register.
Non-maskable interrupt
Non-maskable interrupt, ORed with bit 6 of the interrupt register.
NMI*
Input
Pin Name
Type
Description
JTDI
Input
JTAG data in
JTAG serial data in.
JTAG clock input
JTAG serial clock input.
JTAG data out
JTAG serial data out.
JTAG command
JTAG command signal, signals that the incoming serial data is
command data.
JTCK
Input
JTDO
Output
JTMS
Input
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