
Digital PSoC Blocks
September 5, 2002
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
55
Digital Communications Type A Block 06 Data Register 2
Digital Communications Type A Block 07 Data Register 0
Digital Communications Type A Block 07 Data Register 1
Digital Communications Type A Block 07 Data Register 2
(DCA06DR2, Address = Bank 0, 3Ah)
(DCA07DR0, Address = Bank 0, 3Ch)
(DCA07DR1, Address = Bank 0, 3Dh)
(DCA07DR2, Address = Bank 0, 3Eh)
9.3.2
Digital Basic Type A / Communications Type A Block xx Control Register 0
Digital Basic Type A Block 00 Control Register 0
Digital Basic Type A Block 01 Control Register 0
Digital Basic Type A Block 02 Control Register 0
Digital Basic Type A Block 03 Control Register 0
Digital Communications Type A 04 Control Register 0
Digital Communications Type A 05 Control Register 0
Digital Communications Type A Block 06 Control Register 0
Digital Communications Type A Block 07 Control Register 0
(DBA00CR0, Address = Bank 0, 23h)
(DBA01CR0, Address = Bank 0, 27h)
(DBA02CR0, Address = Bank 0, 2Bh)
(DBA03CR0, Address = Bank 0, 2Fh)
(DCA04CR0, Address = Bank 0, 33h)
(DCA05CR0, Address = Bank 0, 37h)
(DCA06CR0, Address = Bank 0, 3Bh)
(DCA07CR0, Address = Bank 0, 3Fh)
Table 53:
R/W Variations per User Module Selection
Function
DR0
R/W
DR1
R/W
DR2
R/W
Timer
Count
R
1
Period Value
W
Capture Value
RW
Counter
Count
R
1
Period Value
W
Compare Value
RW
CRC
Current Value/CRC Residue
R
1
Polynomial Mask Value
W
Seed Value
RW
PRS
Current Value
R
1
Polynomial Mask Value
W
Seed Value
RW
Deadband
Count
R
1
Period Value
W
Not Used
RW
RX UART
Shifter
NA
Not Used
NA
Data Register
R
TX UART
Shifter
NA
Data Register
W
Not Used
NA
SPI
Shifter
NA
TX Data Register
RX Data Register
R
1.
Each time the register is read, its value is written to the DR2 register.
Table 54:
Digital Basic Type A / Communications Type A Block xx Control Register 0
Bit #
POR
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
Read/Write
VF
1
1.
Varies by function.
VF
1
VF
1
VF
1
VF
1
VF
1
VF
1
VF
1
Bit Name
Data [7]
Data [6]
Data [5]
Data [4]
Data [3]
Data [2]
Data [1]
Data [0]
Bit [7:0]
:
Data [7:0]