- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄368307 > PSOC (Cypress Semiconductor Corp.) 8-Bit Programmable System-on-Chip (PSoC⑩) Microcontrollers PDF資料下載
參數(shù)資料
| 型號： | PSOC |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 8-Bit Programmable System-on-Chip (PSoC⑩) Microcontrollers |
| 中文描述： | 8位可編程系統(tǒng)（的PSoC⑩）微控制器片上 |
| 文件頁數(shù)： | 42/148頁 |
| 文件大?。?/td> | 1412K |
| 代理商： | PSOC |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁當前第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁
Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
42
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
September 5, 2002
7.2.3
Digital PSoC Block Clocking Options
All digital PSoC block clocks are a user-selectable
choice of
48M
,
24V1
,
24V2
, or
32K
, as well as clocking
signals from other digital PSoC blocks or general pur-
pose I/O pins. There are a total of 16 possible clock
options for each digital PSoC block. See the
Digital
PSoC Block
section for details.
8.0
Interrupts
8.1
Overview
Interrupts can be generated by the General Purpose I/O
lines, the Power monitor, the internal Sleep Timer, the
eight Digital PSoC blocks, and the four analog columns.
Every interrupt has a separate enable bit, which is con-
tained in the General Interrupt Mask Register
(INT_MSK0) and the Digital PSoC Block Interrupt Mask
Register (INT_MSK1). When the user writes a “1” to a
particular bit position, this enables the interrupt associ-
ated with that position. There is a single Global Interrupt
Enable bit in the Flags Register (CPU_F), which can dis-
able all interrupts, or enable those interrupts that also
have their individual interrupt bit enabled. During a reset,
the enable bits in the General Interrupt Mask Register
(INT_MASK0), the enable bits in the Digital PSoC Block
Interrupt Mask Register (INT_MSK1) and the Global
Interrupt Enable bit in the Flags Register (CPU_F) are all
cleared. The Interrupt Vector Register (INT_VC) holds
the interrupt vector for the highest priority pending inter-
rupt when read, and when written will clear all pending
interrupts.
If there is only one interrupt pending and an instruction is
executed that would mask that pending interrupt (by
clearing the corresponding bit in either of the interrupt
mask registers at address E0h or E1h in Bank 0), the
CPU will take that interrupt. Since the pending interrupt
has been cleared and there are no others, the resulting
interrupt vector is 0000h and the CPU will jump to the
user code at the beginning of Flash. To address this
issue, use the macro defined in
m8c.inc
called
"M8C_DisableIntMask" in PSoC Designer. This macro
brackets the register write with a disable then an enable
of global interrupts.
相關PDF資料 |
PDF描述 |
|---|---|
| PSOT03LC | ULTRA LOW CAPACITANCE TVS ARRAY |
| PS0T03LC | ULTRA LOW CAPACITANCE TVS ARRAY |
| PSOT05LC | ULTRA LOW CAPACITANCE TVS ARRAY |
| PSOT08LC | ULTRA LOW CAPACITANCE TVS ARRAY |
| PSOT12LC | D-SUB |
相關代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSOK10001 | 制造商:Value Added 功能描述: |
| PSOODO3A | 制造商:MACOM 制造商全稱:Tyco Electronics 功能描述:Versatile Power Entry Module with Small Footprint |
| PSOODO3B | 制造商:MACOM 制造商全稱:Tyco Electronics 功能描述:Versatile Power Entry Module with Small Footprint |
| PSOODO6A | 制造商:MACOM 制造商全稱:Tyco Electronics 功能描述:Versatile Power Entry Module with Small Footprint |
| PSOODO6B | 制造商:MACOM 制造商全稱:Tyco Electronics 功能描述:Versatile Power Entry Module with Small Footprint |
發(fā)布緊急采購，3分鐘左右您將得到回復。