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| 型號(hào)： | PSOC |
| 廠(chǎng)商： | Cypress Semiconductor Corp. |
| 英文描述： | 8-Bit Programmable System-on-Chip (PSoC⑩) Microcontrollers |
| 中文描述： | 8位可編程系統(tǒng)（的PSoC⑩）微控制器片上 |
| 文件頁(yè)數(shù)： | 32/148頁(yè) |
| 文件大?。?/td> | 1412K |
| 代理商： | PSOC |
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Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
32
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
September 5, 2002
6.3
Port Global Select Registers
Port 0 Global Select Register (PRT0GS, Address = Bank 0, 02h)
Port 1 Global Select Register (PRT1GS, Address = Bank 0, 06h)
Port 2 Global Select Register (PRT2GS, Address = Bank 0, 0Ah)
Port 3 Global Select Register (PRT3GS, Address = Bank 0, 0Eh)
Port 4 Global Select Register (PRT4GS, Address = Bank 0, 12h)
Port 5 Global Select Register (PRT5GS, Address = Bank 0, 16h) Note: If implemented, Port 5 is 4-bits wide
6.3.1
Port Drive Mode 0 Registers
Port 0 Drive Mode 0 Register (PRT0DM0, Address = Bank 1, 00h)
Port 1 Drive Mode 0 Register (PRT1DM0, Address = Bank 1, 04h)
Port 2 Drive Mode 0 Register (PRT2DM0, Address = Bank 1, 08h)
Port 3 Drive Mode 0 Register (PRT3DM0, Address = Bank 1, 0Ch)
Port 4 Drive Mode 0 Register (PRT4DM0, Address = Bank 1, 10h)
Port 5 Drive Mode 0 Register (PRT5DM0, Address = Bank 1, 14h)
Note
: Port 5 is 4-bits wide
Table 30:
Port Global Select Registers
Bit #
POR
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
Read/Write
W
W
W
W
W
W
W
W
Bit Name
GlobSel
[7]
GlobSel
[6]
GlobSel
[5]
GlobSel
[4]
GlobSel
[3]
GlobSel
[2]
GlobSel
[1]
GlobSel
[0]
Bit [7:0]
:
Global Select
[7:0]
When written determines whether a pin is connected to the Global Input Bus and Glo-
bal Output Bus
0 = Not Connected
1 = Connected
Drive Mode xx = Global Select Register 0 = Standard CPU controlled port (Default)
Drive Mode 1 0 (High Z) = Global Select Register 1 = Direct Drive of associated Global Input line
Drive Mode 0 0, 0 1, 1 1 = Global Select Register 1 = Direct Receive from associated Global Output line
Table 31:
Port Drive Mode 0 Registers
Bit #
POR
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
Read/Write
W
W
W
W
W
W
W
W
Bit Name
DM0 [7]
DM0 [6]
DM0 [5]
DM0 [4]
DM0 [3]
DM0 [2]
DM0 [1]
DM0 [0]
Bit [7:0]
:
DM0
[7:0]
The two Drive Mode bits that control a particular port pin are treated as a pair and are decoded
as follows:
Port Data Register Bit 0 = Drive Mode 0 0 = 0 Resistive (Default)
Port Data Register Bit 0 = Drive Mode 0 1 = 0 Strong
Port Data Register Bit 0 = Drive Mode 1 0 = High Z
Port Data Register Bit 0 = Drive Mode 1 1 = 0 Strong
Port Data Register Bit 1 = Drive Mode 0 0 = 1 Strong
Port Data Register Bit 1 = Drive Mode 0 1 = 1 Strong
Port Data Register Bit 1 = Drive Mode 1 0 = High Z
Port Data Register Bit 1 = Drive Mode 1 1 = 1 Resistive
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