參數(shù)資料
型號(hào)： PSOC
廠商： Cypress Semiconductor Corp.
英文描述： 8-Bit Programmable System-on-Chip (PSoC⑩) Microcontrollers
中文描述： 8位可編程系統(tǒng)（的PSoC⑩）微控制器片上
文件頁數(shù)： 24/148頁
文件大?。?/td> 1412K
代理商： PSOC
Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
24
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
September 5, 2002
Examples
:
2.3.8
Destination Direct Direct
The result of an instruction using this addressing mode is
placed within the RAM memory. Operand 1 is the
address of the result. Operand 2 is an address that
points to a location in the RAM memory that is the source
for the instruction. This addressing mode is only valid on
the MOV instruction. The instruction using this address-
ing mode is three bytes in length.
Example
:
2.3.9
Source Indirect Post Increment
The result of an instruction using this addressing mode is
placed in the Accumulator. Operand 1 is an address
pointing to a location within the memory space, which
contains an address (the indirect address) for the source
of the instruction. The indirect address is incremented as
part of the instruction execution. This addressing mode
is only valid on the MVI instruction. The instruction using
this addressing mode is two bytes in length. See
Sec-
tion 7. Instruction Set
in
PSoC Designer: Assembly
Language User Guide
for further details on MVI instruc-
tion.
Example
:
2.3.10 Destination Indirect Post Increment
The result of an instruction using this addressing mode is
placed within the memory space. Operand 1 is an
address pointing to a location within the memory space,
which contains an address (the indirect address) for the
destination of the instruction. The indirect address is
incremented as part of the instruction execution. The
source for the instruction is the Accumulator. This
addressing mode is only valid on the MVI instruction.
The instruction using this addressing mode is two bytes
in length.
Example
:
ADD
[X+7],
5
;In this case, the
;value in the memory
;location at address
;X+7 is added with
;the immediate value
;of 5, and the result
;is placed in the
;memory location at
;address X+7.
MOV
REG[X+8], 6
;In this case, the
;immediate value of 6
;is moved into the
;location in the
;register space at
;address X+8.
Table 20:
Destination Direct Direct
Opcode
Operand 1
Operand 2
Instruction
Destination Address
Source Address
MOV
[7], [8]
;In this case, the value
;in the memory location at
;address 8 is moved to the
;memory location at
;address 7.
Table 21:
Source Indirect Post Increment
Opcode
Operand 1
Instruction
Source Address Address
MVI
A,
[8]
;In this case, the value
;in the memory location at
;address 8 is an indirect
;address. The memory
;location pointed to by
;the indirect address is
;moved into the
;Accumulator. The
;indirect address is then
;incremented.
Table 22:
Destination Indirect Post Increment
Opcode
Operand 1
Instruction
Destination Address Address
MVI
[8],
A
;In this case, the
;value in the memory
;location at address 8
;is an indirect
;address. The
;Accumulator is moved
;into the memory
;location pointed to by
;the indirect address.
;The indirect address
;is then incremented.
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