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| 型號(hào)： | PSOC |
| 廠商： | Cypress Semiconductor Corp. |
| 英文描述： | 8-Bit Programmable System-on-Chip (PSoC⑩) Microcontrollers |
| 中文描述： | 8位可編程系統(tǒng)（的PSoC⑩）微控制器片上 |
| 文件頁(yè)數(shù)： | 22/148頁(yè) |
| 文件大?。?/td> | 1412K |
| 代理商： | PSOC |
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Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
22
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
September 5, 2002
Examples
:
2.3.2
Source Direct
The result of an instruction using this addressing mode is
placed in either the A register or the X register, which is
specified as part of the instruction opcode. Operand 1 is
an address that points to a location in either the RAM
memory space or the register space that is the source for
the instruction. Arithmetic instructions require two
sources, the second source is the A register or X register
specified in the opcode. Instructions using this address-
ing mode are two bytes in length.
Examples
:
2.3.3
Source Indexed
The result of an instruction using this addressing mode is
placed in either the A register or the X register, which is
specified as part of the instruction opcode. Operand 1 is
added to the X register forming an address that points to
a location in either the RAM memory space or the regis-
ter space that is the source for the instruction. Arithmetic
instructions require two sources, the second source is
the A register or X register specified in the opcode.
Instructions using this addressing mode are two bytes.
Examples
:
2.3.4
Destination Direct
The result of an instruction using this addressing mode is
placed within either the RAM memory space or the regis-
ter space. Operand 1 is an address that points to the
location of the result. The source for the instruction is
either the A register or the X register, which is specified
as part of the instruction opcode. Arithmetic instructions
require two sources, the second source is the location
specified by Operand 1. Instructions using this address-
ing mode are two bytes in length.
ADD
A,
7
;In this case, the immediate
;value of 7 is added with the
;Accumulator, and the result
;is placed in the
;Accumulator.
MOV
X,
8
;In this case, the immediate
;value of 8 is moved to the X
;register.
AND
F,
9
;In this case, the immediate
;value of 9 is logically
;ANDed with the F register
;and the result is placed in
;the F register.
Table 14:
Source Direct
Opcode
Operand 1
Instruction
Source Address
ADD
A,
[7]
;In this case, the
;value in the RAM
;memory location at
;address 7 is added
;with the Accumulator,
;and the result is
;placed in the
;Accumulator.
MOV
X,
REG[8]
;In this case, the
;value in the register
;space at address 8 is
;moved to the X
;register.
Table 15:
Source Indexed
Opcode
Operand 1
Instruction
Source Index
ADD
A,
[X+7]
;In this case, the
;value in the memory
;location at address
;X + 7 is added with
;the Accumulator, and
;the result is placed
;in the Accumulator.
MOV
X,
REG[X+8]
;In this case, the
;value in the
;register space at
;address X + 8 is
;moved to the X
;register.
Table 16:
Destination Direct
Opcode
Operand 1
Instruction
Destination Address
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