參數(shù)資料
型號： PSOC
廠商： Cypress Semiconductor Corp.
英文描述： 8-Bit Programmable System-on-Chip (PSoC⑩) Microcontrollers
中文描述： 8位可編程系統(tǒng)（的PSoC⑩）微控制器片上
文件頁數(shù)： 110/148頁
文件大小： 1412K
代理商： PSOC
Cypress MicroSystems CY8C25122/CY8C26233/CY8C26443/CY8C26643 Family Data Sheet
110
Document #: 38-12010 CY Rev. ** CMS Rev. 3.20
September 5, 2002
Accumulator Result 3 / Multiply/Accumulator Clear 0 Register (ACC_DR3 / MAC_CL0, Address = Bank 0, EEh)
Accumulator Result 2 / Multiply/Accumulator Clear 1 Register (ACC_DR2 / MAC_CL1, Address = Bank 0, EFh)
11.2
Decimator
The output of a
Σ
modulator is a high-speed, single bit
A/D converter. A single bit A/D converter is of little use to
anyone and must be converted to a lower speed multiple
bit output. Converting this high-speed single bit data
stream to a lower speed multiple bit data stream requires
a data decimator.
A “divide by n” decimator is a digital filter that takes the
single bit data at a fast rate and outputs multiple bits at
one n
th
the speed. For a single stage
Σ
converter, the
optimal filter has a sinc
2
response. This filter can be
implemented as a finite impulse response (FIR) filter and
for a “divide by n” implementation should have the follow-
ing coefficients:
Table 88:
Accumulator Result 3 / Multiply/Accumulator Clear 0 Register
Bit #
POR
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
Read/Write
RW
RW
RW
RW
RW
RW
RW
RW
Bit Name
Data [7]
Data [6]
Data [5]
Data [4]
Data [3]
Data [2]
Data [1]
Data [0]
Bit [7:0]
:
Data [7:0]
8-bit data value when read is the highest order result of the multiply/accumulate function
Any 8-bit data value when written will cause all four Accumulator result registers to clear
Table 89:
Accumulator Result 2 / Multiply/Accumulator Clear 1 Register
Bit #
POR
7
6
5
4
3
2
1
0
0
0
0
0
0
0
0
0
Read/Write
RW
RW
RW
RW
RW
RW
RW
RW
Bit Name
Data [7]
Data [6]
Data [5]
Data [4]
Data [3]
Data [2]
Data [1]
Data [0]
Bit [7:0]
:
Data [7:0]
8-bit data value when read is next to highest order result of the multiply/accumulate function
Any 8-bit data value when written will cause all four Accumulator result registers to clear
Figure 29: Decimator Coefficients
0
n
Coeff
t
0
n-1
2n-1
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