- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄299790 > PSD813F2A-15JI (STMICROELECTRONICS) 128K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 PDF資料下載
參數(shù)資料
| 型號： | PSD813F2A-15JI |
| 廠商： | STMICROELECTRONICS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 128K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| 封裝： | PLASTIC, LCC-52 |
| 文件頁數(shù)： | 41/110頁 |
| 文件大?。?/td> | 837K |
| 代理商： | PSD813F2A-15JI |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁當(dāng)前第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁
PSD813F2, PSD833F2, PSD834F2, PSD853F2, PSD854F2
36/110
Complex PLD (CPLD)
The CPLD can be used to implement system logic
functions, such as loadable counters and shift reg-
isters, system mailboxes, handshaking protocols,
state machines, and random logic. The CPLD can
also be used to generate three External Chip Se-
lect (ECS0-ECS2), routed to Port D.
Although External Chip Select (ECS0-ECS2) can
be produced by any Output Macrocell (OMC),
these three External Chip Select (ECS0-ECS2) on
Port D do not consume any Output Macrocells
(OMC).
As shown in Figure 13., page 34, the CPLD has
the following blocks:
■
24 Input Macrocells (IMC)
■
16 Output Macrocells (OMC)
■
Macrocell Allocator
■
Product Term Allocator
■
AND Array capable of generating up to 137
product terms
■
Four I/O Ports.
Each of the blocks are described in the sections
that follow.
The Input Macrocells (IMC) and Output Macrocells
(OMC) are connected to the PSD internal data bus
and can be directly accessed by the MCU. This
enables the MCU software to load data into the
Output Macrocells (OMC) or read data from both
the Input and Output Macrocells (IMC and OMC).
This feature allows efficient implementation of sys-
tem logic and eliminates the need to connect the
data bus to the AND Array as required in most
standard PLD macrocell architectures.
Figure 15. Macrocell and I/O Port
I/O PORTS
CPLD MACROCELLS
INPUT MACROCELLS
LATCHED
ADDRESS OUT
MUX
D
Q
G
D
QD
WR
PDR
DATA
PRODUCT TERM
ALLOCATOR
DIR
REG.
SELECT
INPUT
PRODUCT TERMS
FROM OTHER
MACROCELLS
POLARITY
SELECT
UP TO 10
PRODUCT TERMS
CLOCK
SELECT
PR
DI LD
D/T
CK
CL
Q
D/T/JK FF
SELECT
PT CLEAR
PT
CLOCK
GLOBAL
CLOCK
PT OUTPUT ENABLE (OE)
MACROCELL FEEDBACK
I/O PORT INPUT
ALE/AS
PT INPUT LATCH GATE/CLOCK
MCU LOAD
PT PRESET
MCU DATA IN
COMB.
/REG
SELECT
MACROCELL
TO
I/O PORT
ALLOC.
CPLD
OUTPUT
TO OTHER I/O PORTS
PLD
INPUT
BUS
PLD
INPUT
BUS
MCU ADDRESS / DATA BUS
MACROCELL
OUT TO
MCU
DATA
LOAD
CONTROL
AND
ARRAY
CPLD OUTPUT
I/O PIN
AI02874
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD834F2VA-15MI | 256K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
| PSD854F2A-90MT | 256K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
| PSD854F2A-90UT | 256K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP64 |
| PSH665-FREQ-OUT1 | VCXO, SINE OUTPUT, 465 MHz - 865 MHz |
| PSM3-022K | 1 ELEMENT, 0.022 uH, GENERAL PURPOSE INDUCTOR, SMD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD813F2A-15JIT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD813F2A-15JT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD813F2A-15M | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD813F2A-15MI | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
| PSD813F2A-15MIT | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Flash In-System Programmable ISP Peripherals For 8-bit MCUs |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。