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參數(shù)資料
| 型號： | PSD411A1-C-90JI |
| 廠商： | 意法半導(dǎo)體 |
| 英文描述： | High Speed CMOS Logic Dual 2-to-4 Line Decoders/Demultiplexers 16-SOIC -55 to 125 |
| 中文描述： | 低成本現(xiàn)場可編程微控制器外圍設(shè)備 |
| 文件頁數(shù)： | 52/123頁 |
| 文件大?。?/td> | 657K |
| 代理商： | PSD411A1-C-90JI |
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PSD4XX Famly
49
9.3.3 Address Out
For microcontrollers with a multiplexed address/data bus, the I/O ports in Address-Out
mode are able to provide latched address outputs (A0 – A15) to external devices. This
mode of operation requires the user to:
J
Configuration
1.Declare the pins used as address line outputs in the ABEL file (PSDsoft).
2.Write “0” to the corresponding bit in the Control Register associated with each
I/O port.
3.Set the Direction Register to Output Mode.
9.3.4 Address In
There are two Address In modes:
1. For Port A - as other address line (A2-A7 and A16-A23) inputs to the DPLD. Additional
address inputs included in the EPROM decoding must come from Port A. The address
inputs are latched internally by ALE/AS if Multiplexed Bus is specified in PSDsoft.
2. For Ports C and D – as address inputs to the ZPLD for general decoding,
should not be used in EPROM decoding.
J
Configuration
1.Declare pins or signals used as Address In in the ABEL file (PSDsoft).
2.Write latch equations in the .ABL file, e.g., A16.LE = ALE.
3.Include latched address in logic equations.
9.3.5 Data Port
In this mode, the port is acting as a data bus port for a microcontroller which has a
non-multiplexed address/data bus. The Data Port is connected to the data bus of the
microcontroller and the ADIO port is connected to the address bus.
J
Configuration
Select the non-multiplexed bus option in PSD configuration (PSDsoft).
9.3.6 Alternate Function In
This mode is per-pin configurable and enables the user to define pin PE7 of Port E as
Automatic Power Down (APD) CLK input.
J
Configuration
1.Select input functions in PSD configuration.
2.PSD Compiler assigns pins for the selected options.
The PSD4XX
Architecture
(cont.)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| PSD411A1-C-90UI | High Speed CMOS Logic Hex Schmitt-Triggered Inverters 14-PDIP -55 to 125 |
| PSD411A2-C-70J | High Speed CMOS Logic Hex Schmitt-Triggered Inverters 14-SOIC -55 to 125 |
| PSD411A2-C-70L | High Speed CMOS Logic Hex Schmitt-Triggered Inverters 14-SOIC -55 to 125 |
| PSD411A2-C-70U | High Speed CMOS Logic Hex Schmitt-Triggered Inverters 14-SOIC -55 to 125 |
| PSD411A2-C-90JI | High Speed CMOS Logic Hex Schmitt-Triggered Inverters 14-SOIC -55 to 125 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD411A1-C-90UI | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
| PSD411A2 | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:Low Cost Field Programmable Microcontroller Peripherals |
| PSD411A2-12J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD411A2-12JI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
| PSD411A2-12LI | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Field-Programmable Peripheral |
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