產品概述
The TPS51100DGQR is a 3A sink and source double-data-rate (DDR) Terminator Regulator. The devICe maintains fast transient response, only requiring 20μF (2 x 10μF) of ceramic output capacitance. The device supports remote sensing functions and all features required to power the DDR and DDR2 VTT bus termination according to the JEDEC specification. The device also supports DDR3 VTT termination with VDDQ at 1.5V (typical). In addition, the device includes integrated sleep-state controls, placing VTT in Hi-Z in S3 (suspend to RAM) and soft-OFF for VTT and VTTREF in S5 (suspend to disk).
3A Sink and source termination regulator Includes droop compensation
1.2V Input (VLDOIN) helps reduce total power dissipation
Integrated divider tracks 0.5 VDDQSNS for VTT and VTTREF
Remote sensing (VTTSNS)
±20mV Accuracy for VTT and VTTREF
10mA Buffered reference (VTTREF)
Built-in soft-start, UVLO and OCL
Thermal shutdown
Supports JEDEC specifications
Green product and no Sb/Br
應用
產品信息
輸出類型: 固定 輸入電壓最小值: 4.75V 輸入電壓最大值: 5.25V 固定輸出電壓標稱值: 1.25V 可調輸出電壓, 最低: - 可調輸出電壓, 最高: - 輸出電流: 3A 壓降: - LDO調節(jié)器封裝類型: MSOP 針腳數: 10引腳 工作溫度最小值: -40°C 工作溫度最高值: 85°C 產品范圍: 1.25V, 3A LDO Voltage Regulators 汽車質量標準: - MSL: MSL 1 -無限制