參數(shù)資料
型號: PIP201-12M
英文描述: Analog IC
中文描述: 模擬IC
文件頁數(shù): 16/20頁
文件大小: 319K
代理商: PIP201-12M
Philips Semiconductors
PIP201-12M
DC to DC converter powertrain
Preliminary data
Rev. 01 — 24 January 2002
5 of 20
9397 750 09032
Koninklijke Philips Electronics N.V. 2002. All rights reserved.
7.2 MOSFET driver function
The input, output and gate drive waveforms are shown in Figure 4. When the input
voltage goes HIGH, the gate drive to the lower MOSFET immediately goes LOW. This
causes the output current to ow through the source-drain diode of the lower
MOSFET. This causes output voltage to fall from zero to approximately
0.7 V.
After a delay, if the input voltage is still HIGH, the gate drive to the upper MOSFET
goes HIGH. This causes the output voltage to rise to the output stage supply voltage,
VDDO.
When the input voltage goes LOW, the gate drive to the upper MOSFET immediately
goes LOW. The output voltage falls from VDDO, until it is clamped by the source-drain
diode of the synchronous FET at approximately
0.7 V.
After a delay, if the input voltage is still LOW, the gate drive to the lower MOSFET
goes HIGH. The lower MOSFET turns on, and the output voltage rises from
0.7 V to
zero.
7.3 Three-state function
If the input voltage remains between the upper and lower switching thresholds for
longer than 144 ns (typical), both MOSFETs are turned off. This prevents the output
capacitor bank from discharging through the lower MOSFET.
Fig 4.
Input, output and gate drive waveforms of a synchronous DC-DC converter
output stage.
input voltage
output voltage
upper MOSFET
gate drive
lower MOSFET
gate drive
03ag35
delay
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