1. 參數(shù)資料
    型號(hào): PIC16F77-E/L
    廠商: Microchip Technology
    文件頁數(shù): 78/104頁
    文件大?。?/td> 0K
    描述: IC MCU FLASH 8KX14 A/D 44PLCC
    產(chǎn)品培訓(xùn)模塊: Asynchronous Stimulus
    標(biāo)準(zhǔn)包裝: 27
    系列: PIC® 16F
    核心處理器: PIC
    芯體尺寸: 8-位
    速度: 20MHz
    連通性: I²C,SPI,UART/USART
    外圍設(shè)備: 欠壓檢測(cè)/復(fù)位,POR,PWM,WDT
    輸入/輸出數(shù): 33
    程序存儲(chǔ)器容量: 14KB(8K x 14)
    程序存儲(chǔ)器類型: 閃存
    RAM 容量: 368 x 8
    電壓 - 電源 (Vcc/Vdd): 4 V ~ 5.5 V
    數(shù)據(jù)轉(zhuǎn)換器: A/D 8x8b
    振蕩器型: 外部
    工作溫度: -40°C ~ 125°C
    封裝/外殼: 44-LCC(J 形引線)
    包裝: 管件
    其它名稱: PIC16F77E/L
    Micrel, Inc.
    KSZ8851-16MLLJ
    March 2010
    67
    M9999-030210-1.0
    Flow Control Low Watermark Register (0xB0 – 0xB1): FCLWR
    This register is used to control the flow control for low watermark in QMU RX queue.
    Bit
    Default Value
    R/W
    Description
    15-12
    -
    RW
    Reserved
    11-0
    0x0500
    RW
    FCLWC Flow Control Low Watermark Configuration
    These bits are used to define the QMU RX queue low watermark configuration. It is in
    double words count and default is 5.12 KByte available buffer space out of 12 KByte.
    Flow Control High Watermark Register (0xB2 – 0xB3): FCHWR
    This register is used to control the flow control for high watermark in QMU RX queue.
    Bit
    Default Value
    R/W
    Description
    15-12
    -
    RW
    Reserved
    11-0
    0x0300
    RW
    FCHWC Flow Control High Watermark Configuration
    These bits are used to define the QMU RX queue high watermark configuration. It is in
    double words count and default is 3.072 K Byte available buffer space out of 12 KByte.
    Flow Control Overrun Watermark Register (0xB4 – 0xB5): FCOWR
    This register is used to control the flow control for overrun watermark in QMU RX queue
    Bit
    Default Value
    R/W
    Description
    15-12
    -
    RW
    Reserved
    11-0
    0x0040
    RW
    FCLWC Flow Control Overrun Watermark Configuration
    These bits are used to define the QMU RX queue overrun watermark configuration. It is in
    double words count and default is 256 Bytes available buffer space out of 12 Kbyte.
    0xB6 – 0xBF: Reserved
    Chip ID and Enable Register (0xC0 – 0xC1): CIDER
    This register contains the chip ID and the chip enable bit.
    Bit
    Default
    R/W
    Description
    15-8
    0x88
    RO
    Family ID
    Chip family ID
    7-4
    0x7
    RO
    Chip ID
    0x7 is assigned to KSZ8851-16MLLJ
    3-1
    0x1
    RO
    Revision ID
    0
    0x0
    RW
    Reserved
    0xC2 – 0xC5: Reserved
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