參數(shù)資料
型號： PI7C7300DNAE
廠商： Pericom
文件頁數(shù)： 37/107頁
文件大?。?/td> 0K
描述： IC PCI-PCI BRIDGE 3PORT 272-BGA
標準包裝： 40
系列： *
應(yīng)用： *
接口： *
電源電壓： *
封裝/外殼： 272-BBGA
供應(yīng)商設(shè)備封裝： 272-PBGA（27x27）
包裝： 管件
安裝類型： 表面貼裝
PI7C7300D
3-PORT PCI-TO-PCI BRIDGE
Page 35 of 107
Pericom Semiconductor
November 2005 - Revision 1.01
0h
00000
0000 0000 0000 0001
16
1h
00001
0000 0000 0000 0010
17
2h
00010
0000 0000 0000 0100
18
3h
00011
0000 0000 0000 1000
19
4h
00100
0000 0000 0001 0000
20
5h
00101
0000 0000 0010 0000
21
6h
00110
0000 0000 0100 0000
22
7h
00111
0000 0000 1000 0000
23
8h
01000
0000 0001 0000 0000
24
9h
01001
0000 0010 0000 0000
25
Ah
01010
0000 0100 0000 0000
26
Bh
01011
0000 1000 0000 0000
27
Ch
01100
0001 0000 0000 0000
28
Dh
01101
0010 0000 0000 0000
29
Eh
01110
0100 0000 0000 0000
30
Fh
01111
1000 0000 0000 0000
31
10h – 1Eh
10000 – 11110
0000 0000 0000 0000
-
1Fh
11111
Generate special cycle (P_AD[7:2] = 00h)
0000 0000 0000 0000 (P_AD[7:2] = 00h)
-
PI7C7300D can assert up to 16 unique address lines to be used as IDSEL signals for up
to 16 devices on the secondary bus, for device numbers ranging from 0 through 15.
Because of electrical loading constraints of the PCI bus, more than 16 IDSEL signals
should not be necessary. However, if device numbers greater than 15 are desired, some
external method of generating IDSEL lines must be used, and no upper address bits are
then asserted. The configuration transaction is still translated and passed from the
primary bus to the secondary bus. If no IDSEL pin is asserted to a secondary device, the
transaction ends in a master abort.
PI7C7300D forwards Type 1 to Type 0 configuration read or write transactions as
delayed transactions. Type 1 to Type 0 configuration read or write transactions are
limited to a single 32-bit data transfer.
4.8.3
TYPE 1 TO TYPE 1 FORWARDING
Type 1 to Type 1 transaction forwarding provides a hierarchical configuration
mechanism when two or more levels of PCI-to-PCI bridges are used.
When PI7C7300D detects a Type 1 configuration transaction intended for a PCI bus
downstream from the secondary bus, PI7C7300D forwards the transaction unchanged to
the secondary bus. Ultimately, this transaction is translated to a Type 0 configuration
command or to a special cycle transaction by a downstream PCI-to-PCI bridge.
Downstream Type 1 to Type 1 forwarding occurs when the following conditions are met
during the address phase:
The lowest two address bits are equal to 01b.
The bus number falls in the range defined by the lower limit (exclusive) in the
secondary bus number register and the upper limit (inclusive) in the subordinate bus
number register.
The bus command is a configuration read or write transaction.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PI7C7300EVB 功能描述:界面開發(fā)工具 3 Port PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
PI7C8140A 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2 PORT PCI TO PCI BRIDGE PLX PCI 6140 COMPARISON
PI7C8140AEVB 功能描述:界面開發(fā)工具 2 Port PCI to PCI Bridge Eval Brd RoHS:否 制造商:Bourns 產(chǎn)品:Evaluation Boards 類型:RS-485 工具用于評估:ADM3485E 接口類型:RS-485 工作電源電壓:3.3 V
PI7C8140AMA 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2-Port PCI-to-PCI Bridge
PI7C8140AMAE 功能描述:外圍驅(qū)動器與原件 - PCI PCI -to -PCI Bridge 2 Port RoHS:否 制造商:PLX Technology 工作電源電壓: 最大工作溫度: 安裝風格:SMD/SMT 封裝 / 箱體:FCBGA-1156 封裝:Tray
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