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Intel StrataFlash Wireless Memory (L18)
Intel StrataFlash Wireless Memory (L18) with A/D-Multiplexed I/O
Datasheet
July 2006
70
Order Number: 313295-002US
Always clear the Status Register prior to resuming erase operations. Avoid Status
Register ambiguity when issuing commands during Erase Suspend. If a command
sequence error occurs during an erase-suspend state, the Status Register contains the
command sequence error status (SR[7,5,4] set). When the erase operation resumes
and finishes, possible errors during the erase operation cannot be detected via the
Status Register because it contains the previous error status.
15.1.1
Clear Status Register
The Clear Status Register command clears the status register, leaving all partition read
states unchanged. It functions independent of VPP. The Write State Machine (WSM) sets
and clears SR[7,6,2,0], but it sets bits SR[5:3,1] without clearing them. The Status
Register should be cleared before starting a command sequence to avoid any
ambiguity. A device reset also clears the Status Register.
15.2
Read Device Identifier
The Read Device Identifier command instructs the addressed partition to output
manufacturer code, device identifier code, block-lock status, protection register data,
or configuration register data when that partition’s addresses are read (see
Section 9.2,Issuing a Read Device Identifier command to a partition that is programming or erasing
places that partition in the Read Identifier state while the partition continues to
program or erase in the background.
0
Partition Write Status (PWS)
DWS PWS
0
= Program or erase operation in addressed partition.
0
1
= Program or erase operation in other partition.
1
0
= No active program or erase operations.
1
= Reserved.
(Non-buffered EFP operation. For Buffered EFP operation, see
Table 22. Status Register Description (Sheet 2 of 2)
Status Register (SR)
Default Value = 0x80
Table 23. Device Identifier Information (Sheet 1 of 2)
Item
Address(1,2)
Data
Manufacturer Code
PBA + 0x00
0089h
Device ID Code
PBA + 0x01
ID (see
Block Lock Configuration:
BBA + 0x02
Lock Bit:
Block Is Unlocked
AD0 = 0b0
Block Is Locked
AD0 = 0b1
Block Is not Locked-Down
AD1 = 0b0
Block Is Locked-Down
AD1 = 0b1
Configuration Register
PBA + 0x05
Configuration Register Data
Lock Register 0
PBA + 0x80
Protection Register Lock Bits
64-bit Factory-Programmed Protection Register
PBA + 0x81–0x84
Factory Protection Register Data
64-bit User-Programmable Protection Register
PBA + 0x85–0x88
User Protection Register Data