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參數(shù)資料
| 型號： | PF38F40L0YUQ0 |
| 廠商： | NUMONYX |
| 元件分類： | PROM |
| 英文描述： | 16M X 16 FLASH 1.8V PROM, PBGA88 |
| 封裝： | 8 X 11 MM, 1 MM HEIGHT, ROHS COMPLIANT, VFBGA-88 |
| 文件頁數(shù)： | 66/99頁 |
| 文件大?。?/td> | 1419K |
| 代理商： | PF38F40L0YUQ0 |
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Intel StrataFlash Wireless Memory (L18) with A/D-Multiplexed I/O
July 2006
Datasheet
Order Number: 313295-002US
69
Intel StrataFlash Wireless Memory (L18)
15.0
Special Read States
The following sections describe non-array read states. Non-array reads can be
performed in asynchronous read or synchronous burst mode. A non-array read
operation is exactly the same as an array read. However, when using synchronous
burst mode for non-array reads, the same word of data requested will be output on
successive clock edges until the burst length requirements are satisfied. The “flow-
through” feature also applies to synchronous non-array reads. Refer to Section 10.3.1,
“Read Mode” on page 46 for details.
15.1
Read Status Register
The status of any partition is determined by reading the Status Register from the
address of that particular partition. To read the Status Register, issue the Read Status
Register command within the desired partition’s address range. Status Register
information is available at the partition address to which the Read Status Register,
Word Program, or Block Erase command was issued. Status Register data is
automatically made available following a Word Program, Block Erase, or Block Lock
command sequence. Reads from a partition after any of these command sequences
outputs that partition’s status until another valid command is written to that partition
(e.g. Read Array command).
Status Register data is output on AD[7:0], while 0x00 is output on AD[15:8]. In
asynchronous mode the falling edge of OE#, or CE# (whichever occurs first) updates
and latches the Status Register contents. However, reading the Status Register in
synchronous burst mode, CE# or ADV# must be toggled to update status data. Status
Register read operations do not affect the read state of the other partitions.
The Device Write Status bit (SR[7]) provides overall status of the device. The Partition
Status bit (SR[0]) indicates whether the addressed partition or some other partition is
actively programming or erasing. Status register bits SR[6:1] present status and error
information about the program, erase, suspend, VPP, and block-locked operations.
Table 22. Status Register Description (Sheet 1 of 2)
Status Register (SR)
Default Value = 0x80
Device Write
Status
Erase Suspend
Status
Erase Status
Program
Status
VPP Status
Program
Suspend
Status
Block-Locked
Status
Partition Status
DWS
ESS
ES
PS
VPPS
PSS
BLS
PWS
7
6
5
432
10
Bit
Name
Description
7
Device Write Status (DWS)
0 = Device is busy; program or erase cycle in progress; SR[0] valid.
1 = Device is ready; SR[6:1] are valid.
6
Erase Suspend Status (ESS)
0 = Erase suspend not in effect.
1 = Erase suspend in effect.
5
Erase Status (ES)
0 = Erase successful.
1 = Erase fail or program sequence error when set with SR[4,7].
4
Program Status (PS)
0 = Program successful.
1 = Program fail or program sequence error when set with SR[5,7].
3VPP Status (VPPS)
0 = VPP within acceptable limits during program or erase operation.
1 = VPP < VPPLK during program or erase operation.
2
Program Suspend Status (PSS)
0 = Program suspend not in effect.
1 = Program suspend in effect.
1
Block-Locked Status (BLS)
0 = Block not locked during program or erase.
1 = Block locked during program or erase; operation aborted.
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