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參數資料
| 型號： | PCS810TIURF |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO3 |
| 封裝： | ROHS COMPLIANT, SOT-23, 3 PIN |
| 文件頁數： | 3/8頁 |
| 文件大小： | 515K |
| 代理商： | PCS810TIURF |
January 2007
PCS809/PCS810
rev 0.2
3-Pin P Voltage Supervisor
3 of 8
Notice: The information in this document is subject to change without notice.
Detailed Description
RESET OUTPUT
P will be activated at a valid reset state. These P
supervisory circuits assert reset to prevent code execution
errors during power-up, power-down, or brownout
conditions.
RESET
is
guaranteed
to
be
a
logic
low
for
V
TH>VCC>0.9V. Once VCC exceeds the reset threshold,
an internal timer keeps RESET low for the reset timeout
period; after this interval, RESET goes high.
If a brownout condition occurs (VCC drops below the reset
threshold), RESET goes low. Any time VCC goes below
the reset threshold, the internal timer resets to zero, and
RESET goes low. The internal timer is activated after VCC
returns above the reset threshold, and RESET remains
low for the reset timeout period.
BENEFITS
OF
HIGHLY
ACCURATE
RESET
THRESHOLD
PCS809/810 with specified voltage as 5V±10% or
3V±10% are ideal for systems using a 5V±5% or 3V±5%
power supply. The reset is guaranteed to assert after the
power supply falls out of regulation, but before power
drops below the minimum specified operating voltage
range of the system ICs. The pre-trimmed thresholds are
reducing the range over which an undesirable reset may
occur.
Application Information
NEGATIVE-GOING VCC TRANSIENTS
In addition to issuing a reset to the P during power-up,
power-down, and brownout conditions, PCS809 series are
relatively resistant to short-duration negative-going VCC
transient.
ENSURING A VALID RESET OUTPUT DOWN TO
VCC=0
When VCC falls below 0.9V, PCS809 RESET output no
longer sinks current; it becomes an open circuit. In this
case, high-impedance CMOS logic inputs connecting to
RESET can drift to undetermined voltages. Therefore,
PCS809/810 with CMOS is perfect for most applications of
VCC below 0.9V. However in applications where RESET
must be valid down to 0V, adding a pull-down resistor to
RESET causes any leakage currents to flow to ground,
holding RESET low.
INTERFACING TO P WITH BIDIRECTIONAL RESET
PINS
The RESET output on the PCS809 is open drain, this
device interfaces easily with Ps that have bidirectional
reset pins. Connecting the P supervisor’s RESET output
directly to the microcontroller’s RESET pin with a single
pull-up resistor allows either device to assert reset.
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| PCS810LIURFT | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO3 |
| PCS809NSIURFT | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO3 |
| PCS809NJIURF | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO3 |
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相關代理商/技術參數 |
參數描述 |
|---|---|
| PCS811 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4 Pin P Voltage Supervisor with Manual Reset 廠家：PulseCore semiconductor |
| PCS811J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4.0V,5-Pin uP Voltage Supervisor with Manual Reset |
| PCS811JIUKF | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:5-Pin μP Voltage Supervisor with Manual Reset |
| PCS811L | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:4.6V,5-Pin uP Voltage Supervisor with Manual Reset |
| PCS811LIUKF | 制造商:PULSECORE 制造商全稱:PulseCore Semiconductor 功能描述:5-Pin μP Voltage Supervisor with Manual Reset |
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