參數(shù)資料
型號： PCF85162T/1
廠商： NXP SEMICONDUCTORS
元件分類： 顯示驅(qū)動器
英文描述： LIQUID CRYSTAL DISPLAY DRIVER, PDSO48
封裝： 6.10 MM, PLASTIC, MO-153, SOT362-1, TSSOP-48
文件頁數(shù)： 15/43頁
文件大?。?/td> 321K
代理商： PCF85162T/1
PCF85162_2
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 — 7 May 2010
22 of 43
NXP Semiconductors
PCF85162
Universal LCD driver for low multiplex rates
Having two reserved slave addresses allows the following on the same I2C-bus:
Up to 16 PCF85162 for very large LCD applications
The use of two types of LCD multiplex drive modes
The I2C-bus protocol is shown in Figure 16. The sequence is initiated with a START
condition (S) from the I2C-bus master which is followed by one of two possible PCF85162
slave addresses available. All PCF85162 whose SA0 inputs correspond to bit 0 of the
slave address respond by asserting an acknowledge in parallel. This I2C-bus transfer is
ignored by all PCF85162 whose SA0 inputs are set to the alternative level.
After an acknowledgement, one or more command bytes follow, that define the status of
each addressed PCF85162.
The last command byte sent is identified by resetting its most significant bit, continuation
bit C, (see Figure 17). The command bytes are also acknowledged by all addressed
PCF85162s on the bus.
After the last command byte, one or more display data bytes may follow. Display data
bytes are stored in the display RAM at the address specified by the data pointer and the
subaddress counter. Both data pointer and subaddress counter are automatically updated
and the data directed to the intended PCF85162 device.
An acknowledgement after each byte is asserted only by the PCF85162 that are
addressed via address lines A0, A1, and A2. After the last display byte, the I2C-bus
master asserts a STOP condition (P). Alternately a START may be asserted to restart an
I2C-bus access.
Fig 16. I2C-bus protocol
Fig 17. Format of command byte
013aaa235
S
A
0
S
011100
0 A C
COMMAND
A
P
A
DISPLAY DATA
slave address
R/W
acknowledge by
all addressed
PCF85162
acknowledge
by A0, A1 and A2
selected
PCF85162 only
1 byte
update data pointers
and if necessary,
subaddress counter
n
≥ 1 byte(s)
n
≥ 0 byte(s)
msa833
REST OF OPCODE
C
MSB
LSB
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