參數(shù)資料
型號(hào)： PCF85162T/1
廠商： NXP SEMICONDUCTORS
元件分類： 顯示驅(qū)動(dòng)器
英文描述： LIQUID CRYSTAL DISPLAY DRIVER, PDSO48
封裝： 6.10 MM, PLASTIC, MO-153, SOT362-1, TSSOP-48
文件頁(yè)數(shù)： 13/43頁(yè)
文件大?。?/td> 321K
代理商： PCF85162T/1
PCF85162_2
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 02 — 7 May 2010
20 of 43
NXP Semiconductors
PCF85162
Universal LCD driver for low multiplex rates
7.16.3 System configuration
A device generating a message is a transmitter; a device receiving a message is the
receiver. The device that controls the message is the master, and the devices which are
controlled by the master are the slaves (see Figure 14).
7.16.4 Acknowledge
The number of data bytes transferred between the START and STOP conditions from
transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge
cycle.
A slave receiver, which is addressed, must generate an acknowledge after the
reception of each byte.
A master receiver must generate an acknowledge after the reception of each byte that
has been clocked out of the slave transmitter.
The device that acknowledges must pull-down the SDA line during the acknowledge
clock pulse, so that the SDA line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times must be taken into
consideration).
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
Acknowledgement on the I2C-bus is illustrated in Figure 15.
Fig 13. Definition of START and STOP conditions
mbc622
SDA
SCL
P
STOP condition
SDA
SCL
S
START condition
Fig 14. System configuration
mga807
SDA
SCL
MASTER
TRANSMITTER/
RECEIVER
MASTER
TRANSMITTER
SLAVE
TRANSMITTER/
RECEIVER
SLAVE
RECEIVER
MASTER
TRANSMITTER/
RECEIVER
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